公开(公告)号：US20200312224A1

公开(公告)日：2020-10-01

申请号：US16505784

申请日：2019-07-09

Applicant: AU Optronics Corporation

Inventor： Chun-Feng LIN ,  Chuang-Cheng YANG ,  Ming-Hsien LEE ,  Yi-Cheng LIN ,  Wei-Chia CHIU

IPC: G09G3/32

Abstract: A control circuit includes a power supply switch unit and a reset switch unit. The power supply switch unit is electrically connected to a data line and a pixel circuit. When the data line has a data voltage, the power supply switch unit is turned on according to a power supply signal, so that the pixel circuit is charged by the data voltage. The reset switch unit is electrically connected to the pixel circuit. After the pixel circuit is charged by the data voltage, the reset switch unit is turned on according to the reset signal to reset a voltage of the pixel circuit to the reset voltage.

公开(公告)号：US20200098305A1

公开(公告)日：2020-03-26

申请号：US16527758

申请日：2019-07-31

Applicant: AU Optronics Corporation

Inventor： Chuang-Cheng YANG ,  Ming-Hsien LEE ,  Kai-Wei HONG ,  Yi-Cheng LIN ,  Chun-Feng LIN

IPC: G09G3/32 ,  H03K17/00 ,  H03K25/02

Abstract: The disclosure provides a light emitting diode including a light emitting diode (LED), a first transistor, a second transistor and capacitor. A cathode terminal of the LED is configured to receive a first power supply voltage. A first port of the capacitor coupled to the gate of the first transistor is configured to store a data signal in a first duration. A first port of the second transistor is configured to receive a second power supply voltage. A gate of the second transistor is configured to receive a PWM signal in a second duration. A second port of the second transistor is coupled to the second port of the first transistor. The second transistor is turned on for a conducting time in the second duration according to the PWM signal, and the first transistor provides, in the conducting time, a drive current to the LED according to the data signal.

公开(公告)号：US20180315389A1

公开(公告)日：2018-11-01

申请号：US15953720

申请日：2018-04-16

Applicant: AU Optronics Corporation

Inventor： Kai-Wei HONG ,  Chun-Da TU ,  Ming-Hsien LEE ,  Chuang-Cheng YANG ,  Yi-Cheng LIN ,  Chun-Feng LIN

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/06 ,  G11C19/28 ,  G11C19/287

Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.

公开(公告)号：US20200160776A1

公开(公告)日：2020-05-21

申请号：US16415454

申请日：2019-05-17

Applicant: AU Optronics Corporation

Inventor： Ming-Hsien LEE ,  Yi-Cheng LIN ,  Chuang-Cheng YANG ,  Kai-Wei HONG ,  Chun-Feng LIN

IPC: G09G3/32

Abstract: A driving circuit includes a first driving switch, a second driving switch and a current regulating unit. The first driving switch is electrically connected to a first power source and a first light emitting element. When the first driving switch is turned on, the first driving switch is configured to receive a first current. The second driving switch is electrically connected to a second power source and a second light emitting element. When the second driving switch is turned on, the second driving switch is configured to receive a second current. The current regulating unit is electrically connected to a negative terminal of the second light emitting element and a positive terminal of the first light emitting element. When the current regulating unit is disabled, the second current sequentially flows through the second light emitting element and the first light emitting element.

公开(公告)号：US20200090614A1

公开(公告)日：2020-03-19

申请号：US16690606

申请日：2019-11-21

Applicant: AU Optronics Corporation

Inventor： Kai-Wei HONG ,  Chun-Da TU ,  Ming-Hsien LEE ,  Chuang-Cheng YANG ,  Yi-Cheng LIN ,  Chun-Feng LIN

IPC: G09G3/36 ,  G11C19/28 ,  G09G3/20

Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.

公开(公告)号：US20190066622A1

公开(公告)日：2019-02-28

申请号：US16111531

申请日：2018-08-24

Applicant: AU Optronics Corporation

Inventor： Yi-Cheng LIN ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Chun-Da Tu ,  Chuang-Cheng Yang ,  Chun-Feng Lin

IPC: G09G3/36

Abstract: A multiplexer applied to a display device includes: a plurality of switching units, electrically coupled to a data driver and a plurality of pixel units, where the switching units are adapted to receive a plurality of input display data signals output by the data driver, and the switching units output a plurality of output display data signals to the electrically coupled pixel units, where each of the switching units includes a plurality of switch units, configuration locations of the switch units in each of the switching units are the same as, and some of the switch units configured at a same configuration location in the different switching units are electrically coupled to different control signal lines and have different wiring lengths, where the wiring lengths are distances between the switch units and the control signal lines.

公开(公告)号：US20190043412A1

公开(公告)日：2019-02-07

申请号：US15864498

申请日：2018-01-08

Applicant: AU OPTRONICS CORPORATION

Inventor： Chuang-Cheng YANG ,  Chun-Feng LIN ,  Ming-Hsien LEE ,  Kai-Wei HONG ,  Chun-Da TU ,  Yi-Cheng LIN

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08

Abstract: Provided is a gate driving circuit, coupled to a pixel array having multiple gate lines. The gate driving circuit includes multiple shift registers and multiple pull-up transistor, coupled to the pixel array and separately located on two opposite sides of the pixel array. Shift registers located on a same side are sequentially coupled to each other. An nth (n is a positive integer) pull-up transistor includes: a control end, coupled to a control end of a driving transistor of an (n−1)th shift register located on a same side as the nth pull-up transistor; a first end, used to receive a clock signal, where the clock signal is further input to an nth shift register of the shift registers located on an opposite side of the nth pull-up transistor; and a second end, coupled to an nth gate line of the pixel array and used to drive the nth gate line.