公开(公告)号：US11553596B2

公开(公告)日：2023-01-10

申请号：US17342363

申请日：2021-06-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Fan Chen ,  Chien-Hao Wang

IPC: H05K7/00 ,  H05K1/18 ,  H01L21/48 ,  H01L23/538 ,  H01L21/56

Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

公开(公告)号：US11335646B2

公开(公告)日：2022-05-17

申请号：US16814704

申请日：2020-03-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Fan Chen ,  Yu-Ju Liao

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48

Abstract: The present disclosure provides a substrate structure. The substrate structure includes an interconnection structure, a dielectric layer on the interconnection structure, an electronic component embedded in the dielectric layer, and a first conductive via penetrating through the dielectric layer and disposed adjacent to the electronic component. The interconnection structure includes a carrier having a first surface and a second surface opposite to the first surface, a first conductive layer disposed on the first surface of the carrier, and a second conductive layer disposed on the second surface of the carrier. The first conductive via and at least one of the first conductive layer and the second conductive layer define a first shielding structure surrounding the electronic component. A method of manufacturing a substrate structure is also disclosed.

公开(公告)号：US11277917B2

公开(公告)日：2022-03-15

申请号：US16351026

申请日：2019-03-12

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Yu-Ju Liao ,  Chien-Fan Chen ,  Chien-Hao Wang ,  I-Chia Lin

IPC: H05K1/18 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

Abstract: An embedded component package structure including a circuit substrate, an embedded component and a stress compensation layer is provided. The circuit substrate includes a core layer and an asymmetric circuit structure, and the core layer has a first thickness. The embedded component is disposed in the core layer. The stress compensation layer is disposed on one side of the core layer, and the stress compensation layer has a second thickness between 4 μm and 351 μm.

公开(公告)号：US11032911B2

公开(公告)日：2021-06-08

申请号：US16942609

申请日：2020-07-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Fan Chen ,  Chien-Hao Wang

IPC: H05K7/00 ,  H05K1/18 ,  H01L21/48 ,  H01L23/538 ,  H01L21/56

Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

公开(公告)号：US10757813B2

公开(公告)日：2020-08-25

申请号：US16159264

申请日：2018-10-12

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Chien-Fan Chen ,  Chien-Hao Wang

IPC: H05K1/18 ,  H01L21/48 ,  H01L23/538 ,  H01L21/56

Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.