公开(公告)号：US07000122B2

公开(公告)日：2006-02-14

申请号：US09982132

申请日：2001-10-16

Applicant: Alessandro Zafarana ,  Claudia Castelli

Inventor： Alessandro Zafarana ,  Claudia Castelli

IPC: G06F1/26

CPC classification number: G06F1/26 ,  Y10T307/505 ,  Y10T307/555

Abstract: A managing system manages a plurality of VRMs associated with a plurality of microprocessors and connected in parallel together between first and second voltage references, the VRMs having output terminals connected together and arranged to communicate over a common bus. The managing system includes an error amplifier being input an output voltage signal from the VRM plurality, a reference voltage, and a droop voltage produced through an equivalent droop resistor receiving an output current signal from the VRM plurality and being connected to the common bus. The error amplifier effects a comparison of the input signals to generate a control voltage signal to the VRM plurality. Advantageously, the managing system comprises a controller connected to the equivalent droop resistor.

公开(公告)号：US06078203A

公开(公告)日：2000-06-20

申请号：US19893

申请日：1998-02-06

Applicant: Alessandro Zafarana ,  Franco Cocetta ,  Mauro Merlo

Inventor： Alessandro Zafarana ,  Franco Cocetta ,  Mauro Merlo

IPC: H02M3/156 ,  H02P9/30 ,  H03K5/04

CPC classification number: H02P9/305 ,  H02M3/156

Abstract: A voltage regulator of the type comprising a linear filter, a comparator, and a stretcher filter which are connected in cascade with one another between an input terminal and an output terminal of the regulator. The input terminal receives an error signal as converted by the comparator into a square-wave error signal, and the output terminal deliveres a square-wave output control signal which has a stretched duty cycle over the square-wave error signal by a time delay introduced from the stretcher filter. The regulator further comprises a non-linear filtering section for the error signal which is connected between the input terminal of the regulator and the linear filter and has linear gain with the error signal below a first value, gain approximately of unity with the error signal between the first value and a second value, and zero gain with the error signal above the second value.

Abstract translation: 一种类型的电压调节器，包括在调节器的输入端子和输出端子之间彼此级联连接的线性滤波器，比较器和担架滤波器。 输入端子将由比较器转换的误差信号接收为方波误差信号，输出端子通过时间延迟引出方波输出控制信号，该方波输出控制信号在方波误差信号上具有拉伸占空比 从担架过滤器。 调节器还包括用于误差信号的非线性滤波部分，其连接在调节器的输入端和线性滤波器之间并具有线性增益，误差信号低于第一值，增益大约为1， 第一个值和第二个值，零增益，误差信号高于第二个值。

公开(公告)号：US20110133704A1

公开(公告)日：2011-06-09

申请号：US12813025

申请日：2010-06-10

Applicant: Osvaldo Enrico Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Enrico Zambetti ,  Alessandro Zafarana

IPC: G05F1/00 ,  H03C3/02

CPC classification number: H02M3/1584

Abstract: A method is provided for controlling turn-on of phases of a multiphase regulator. According to the method, there are tested the conditions necessary for the turn-on of a phase to be turned-on indicated by a first cell of the phase register, and in response to a positive result a corresponding ramp signal is reset. There is then tested the conditions necessary for the turn-on of a phase successive to the phase to be turned on according to the list of priorities of the phase register, and corresponding ramp signals are reset if there is a positive result. In response to no positive results of testing conditions necessary for the turn-on of all phases successive to the phase to be turned on, there is reset a ramp signal corresponding to a phase successive to a last turned on phase indicated by a last cell of the phase register.

Abstract translation: 提供了一种用于控制多相调节器的相的接通的方法。 根据该方法，测试由相位寄存器的第一单元指示的导通的相位导通所需的条件，并且响应于正的结果，相应的斜坡信号被复位。 然后根据相位寄存器的优先级列表测试连续到要接通的相位的相位接通所需的条件，并且如果存在肯定结果，则相应的斜坡信号被复位。 响应于没有连续到要接通的相位的所有相的接通所需的测试条件的肯定结果，复位对应于由最后一个单元的最后一个单元指示的最后导通相位连续的相位的斜坡信号 相位寄存器。

公开(公告)号：US07885088B2

公开(公告)日：2011-02-08

申请号：US11680250

申请日：2007-02-28

Applicant: Osvaldo Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Zambetti ,  Alessandro Zafarana

IPC: H02J1/10 ,  G05F1/00

CPC classification number: H02M3/156 ,  H02M3/1584

Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned on, and a driving interleaving phase shift is recovered to restart a normal operation of the converter. A controller for carrying out such a method is also provided.

Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法，检测何时发生对转换器的输出端子施加的负载的变化。 转换器的所有相同时导通，并且驱动交错相移被恢复以重新开始转换器的正常操作。 还提供了一种用于执行这种方法的控制器。

公开(公告)号：US20100315049A1

公开(公告)日：2010-12-16

申请号：US12797967

申请日：2010-06-10

Applicant: Alessandro Zafarana ,  Osvaldo Enrico Zambetti

Inventor： Alessandro Zafarana ,  Osvaldo Enrico Zambetti

IPC: G05F1/00

CPC classification number: H02M3/1584

Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of a load applied to an output terminal of the converter occurs. When detected, all of the phases of the converter are simultaneously turned off by the generation of suitable PWM driving signals. The PWM driving signals are controlled so as to force the turn-on of the phases at the same time and to zero a time phase shift of driving of the interleaving type of the PWM driving signals. The interleaving of the driving time phase shift is recovered and a normal operation of the converter is restarted. A controller for controlling a converter of the multiphase interleaving type is also provided.

Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法，检测何时发生施加到转换器的输出端的负载变化。 当检测到转换器的所有相位通过产生合适的PWM驱动信号同时被关断。 控制PWM驱动信号，以便同时强制相的导通，并使驱动交织型PWM驱动信号的时间相移为零。 恢复驱动时间相移的交错，并重新开始转换器的正常操作。 还提供了一种用于控制多相交错类型的转换器的控制器。

公开(公告)号：US07541789B2

公开(公告)日：2009-06-02

申请号：US11236250

申请日：2005-09-27

Applicant: Osvaldo Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Zambetti ,  Alessandro Zafarana

IPC: G05F1/40

CPC classification number: H02M3/1584 ,  G06F1/26

Abstract: The control circuit is for a current sharing bus integrated in signal regulator modules, particularly voltage regulator modules (VRM), the circuit being of the Average Program (AP) type. The circuit includes a voltage regulator module, including an operational transconductance amplifier, a first current generator, connected to a first input terminal of the operational transconductance amplifier, a second current generator connected to a second input of the operational transconductance amplifier. The operational transconductance amplifier is directly driven by currents Ii generated by the first current generator and second current generator.

Abstract translation: 控制电路用于集成在信号调节器模块中的电流共享总线，特别是电压调节器模块（VRM），该电路属于平均程序（AP）类型。 该电路包括一个电压调节器模块，包括一个连接到该工作跨导放大器的第一输入端的一个运算跨导放大器，一个第一电流发生器，一个连接到运算跨导放大器的第二个输入的第二个电流发生器。 工作跨导放大器由第一电流发生器和第二电流发生器产生的电流Ii直接驱动。

公开(公告)号：US20070236205A1

公开(公告)日：2007-10-11

申请号：US11680586

申请日：2007-02-28

Applicant: Osvaldo Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Zambetti ,  Alessandro Zafarana

IPC: B23K11/24

CPC classification number: H02M3/156 ,  H02M3/1584

Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs by detecting the derivative of a voltage signal of the output terminal. All the phases of the converter are simultaneously driven by zeroing a driving interleaving phase shift on the basis of the detected load transient, and the driving interleaving phase shift is recovered to restart a normal operation of the converter. A controller for carrying out such a method is also provided.

Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法，通过检测输出端子的电压信号的导数来检测施加到转换器的输出端子的负载变化。 转换器的所有相位同时通过基于检测到的负载瞬变归零驱动交错相移而被驱动，并且驱动交错相移被恢复以重新开始转换器的正常操作。 还提供了一种用于执行这种方法的控制器。

公开(公告)号：US20070229049A1

公开(公告)日：2007-10-04

申请号：US11680581

申请日：2007-02-28

Applicant: Alessandro Zafarana ,  Osvaldo Zambetti

Inventor： Alessandro Zafarana ,  Osvaldo Zambetti

IPC: G05F1/00

CPC classification number: H02M3/156 ,  H02M3/1584

Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned off, and a driving interleaving phase shift is recovered so as to restart a normal operation of the converter. A controller for carrying out such a method is also provided.

Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法，检测何时发生对转换器的输出端子施加的负载的变化。 转换器的所有相同时关断，并且恢复驱动交错相移，以重新开始转换器的正常操作。 还提供了一种用于执行这种方法的控制器。

公开(公告)号：US20070229048A1

公开(公告)日：2007-10-04

申请号：US11680250

申请日：2007-02-28

Applicant: Osvaldo Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Zambetti ,  Alessandro Zafarana

IPC: G05F1/00

CPC classification number: H02M3/156 ,  H02M3/1584

Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned on, and a driving interleaving phase shift is recovered to restart a normal operation of the converter. A controller for carrying out such a method is also provided.

Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法，检测何时发生施加到转换器的输出端子的负载变化。 转换器的所有相同时导通，并且驱动交错相移被恢复以重新开始转换器的正常操作。 还提供了一种用于执行这种方法的控制器。

公开(公告)号：US20050040865A1

公开(公告)日：2005-02-24

申请号：US10897326

申请日：2004-07-22

Applicant: Alessandro Zafarana

Inventor： Alessandro Zafarana

IPC: H03K5/08 ,  H03K5/153

CPC classification number: H03K5/082

Abstract: A multisense-adaptive reading circuit is described, which is associated to a sense element of an interleaved DC-DC converter module. The reading circuit comprises at least a first and second current source connected to a first and second terminal of the module, connected in turn to a first and second resistive element, as well as a tracker of a current information coming from the first and second current source. Advantageously according to the invention, the reading circuit also comprises a reading mode detector effective to detect a common mode voltage value and, based on this value, to determine a reading mode being used among possible reading modes to self-adapt the reading circuit to the reading mode being used by providing convenient enabling signals to the first and second current sources and to the tracker. A multisense-self-adaptive reading method being implemented by means of that circuit is also described.

Abstract translation: 描述了与交织的DC-DC转换器模块的感测元件相关联的多重自适应读取电路。 读取电路包括至少连接到模块的第一和第二端子的第一和第二电流源，其依次连接到第一和第二电阻元件，以及来自第一和第二电流的电流信息的跟踪器 资源。 有利地，根据本发明，读取电路还包括有效检测共模电压值的读取模式检测器，并且基于该值，确定在可能的读取模式之间使用的读取模式，以将读取电路自适应到 通过向第一和第二电流源和跟踪器提供方便的启用信号来使用读取模式。 还描述了通过该电路实现的多重自适应读取方法。