公开(公告)号：US07898291B2

公开(公告)日：2011-03-01

申请号：US12534841

申请日：2009-08-03

申请人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

发明人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

IPC分类号： H03K19/173

CPC分类号： G06F17/5054 ,  G06F17/5077 ,  H03K19/173 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The reconfigurable circuits include several time-extending reconfigurable circuits. During the operation of the IC, each particular time-extending reconfigurable circuit maintains at least one of its configurations over at least two contiguous cycles, in order to allow a signal to propagate through a signal path, which contains the particular time-extending circuit, within a desired amount of time. Some embodiments provide a method of designing a reconfigurable IC that has several reconfigurable circuits, each having several configurations and operating in several reconfiguration cycles. The method identifies a signal path through the IC that does not meet a timing constraint. The signal path includes several circuits, one of which is a particular reconfigurable circuit. The method then maintains a configuration of the particular reconfigurable circuit constant over at least two contiguous reconfiguration cycles in order to reduce signal delay through the signal path and thereby satisfy the timing constraint.

摘要翻译： 一些实施例提供可重构集成电路（“IC”）。 该IC具有几个可重新配置电路，每个具有几个配置周期的配置。 可重新配置的电路包括几个延时可重构电路。 在IC的操作期间，每个特定的时间延长的可重新配置电路在至少两个连续周期内保持其配置中的至少一个，以便允许信号传播通过包含特定延时电路的信号路径， 在期望的时间内。 一些实施例提供了一种设计可重配置IC的方法，该可重配置IC具有若干可重构电路，每个可重新配置电路具有若干配置并在几个重新配置周期中操作。 该方法识别通过IC的不符合定时约束的信号路径。 信号路径包括几个电路，其中之一是特定的可重新配置电路。 该方法然后在至少两个连续的重新配置周期上保持特定可重新配置电路的配置不变，以减少通过信号路径的信号延迟，从而满足定时约束。

公开(公告)号：US20100066407A1

公开(公告)日：2010-03-18

申请号：US12534841

申请日：2009-08-03

申请人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

发明人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

IPC分类号： H03K19/173 ,  G06F17/50

CPC分类号： G06F17/5054 ,  G06F17/5077 ,  H03K19/173 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The reconfigurable circuits include several time-extending reconfigurable circuits. During the operation of the IC, each particular time-extending reconfigurable circuit maintains at least one of its configurations over at least two contiguous cycles, in order to allow a signal to propagate through a signal path, which contains the particular time-extending circuit, within a desired amount of time. Some embodiments provide a method of designing a reconfigurable IC that has several reconfigurable circuits, each having several configurations and operating in several reconfiguration cycles. The method identifies a signal path through the IC that does not meet a timing constraint. The signal path includes several circuits, one of which is a particular reconfigurable circuit. The method then maintains a configuration of the particular reconfigurable circuit constant over at least two contiguous reconfiguration cycles in order to reduce signal delay through the signal path and thereby satisfy the timing constraint.

摘要翻译： 一些实施例提供可重构集成电路（“IC”）。 该IC具有几个可重新配置电路，每个具有几个配置周期的配置。 可重新配置的电路包括几个延时可重构电路。 在IC的操作期间，每个特定的时间延长的可重新配置电路在至少两个连续周期内保持其配置中的至少一个，以便允许信号传播通过包含特定延时电路的信号路径， 在期望的时间内。 一些实施例提供了一种设计可重配置IC的方法，该可重配置IC具有若干可重构电路，每个可重新配置电路具有若干配置并在几个重新配置周期中操作。 该方法识别通过IC的不符合定时约束的信号路径。 信号路径包括几个电路，其中之一是特定的可重新配置电路。 该方法然后在至少两个连续的重新配置周期上保持特定可重新配置电路的配置不变，以减少通过信号路径的信号延迟，从而满足定时约束。

公开(公告)号：US07557609B2

公开(公告)日：2009-07-07

申请号：US11558870

申请日：2006-11-10

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： H01L25/00 ,  H03K19/177

CPC分类号： H01L27/0207 ,  H01L27/11807 ,  H03K19/17736

摘要： Some embodiments provide an IC with a configurable node array that has (1) two similar nodes within the interior of the array, and (2) two different connection schemes. The first connection scheme specifies a set of connections between the first node and a set of nodes in the array, while the second connection scheme specifies a second set of connections between the second node and a set of nodes in the array. The two nodes cannot connect to any nodes on the boundary of the array with any connection that is specified in any connection scheme.

摘要翻译： 一些实施例提供具有可配置节点阵列的IC，其具有（1）阵列内部的两个相似节点，以及（2）两种不同的连接方案。 第一连接方案指定第一节点和阵列中的一组节点之间的一组连接，而第二连接方案指定第二节点和阵列中的一组节点之间的第二组连接。 两个节点无法连接到任何连接方案中指定的任何连接的数组边界上的任何节点。

公开(公告)号：US07496879B2

公开(公告)日：2009-02-24

申请号：US11081823

申请日：2005-03-15

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F17/50

CPC分类号： G06F17/5054 ,  H03K19/17776

摘要： Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several different operations for the configurable circuits to perform in different operational cycles. The method assigns the operations concurrently to different operational cycles and different configurable circuits. In some embodiments, the method concurrently optimizes the assignment of the operations to different operation cycles and different configurable circuits. In some embodiments, the optimization includes moving the operations between different operational cycles and different configurable circuits in order to identify an assignment of the operations that satisfies a set of optimization criteria.

摘要翻译： 一些实施例提供了一种用多个可配置电路设计可配置集成电路（“IC”）的方法。 该方法接收具有用于可配置电路的几个不同操作的设计，以在不同的操作周期中执行。 该方法将操作同时分配给不同的操作周期和不同的可配置电路。 在一些实施例中，该方法同时优化对不同操作周期和不同可配置电路的操作分配。 在一些实施例中，优化包括移动不同操作周期和不同可配置电路之间的操作，以便识别满足一组优化标准的操作的分配。

公开(公告)号：US20080059937A1

公开(公告)日：2008-03-06

申请号：US11852320

申请日：2007-09-09

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F17/50

CPC分类号： H03K19/17708 ,  G06F17/5054 ,  G06F17/5077 ,  G06F2217/08

摘要： Some embodiments provide a method that defines a set of connections that connect the nodes in a configurable node array. The method identifies different sets of connections for connecting a set of the nodes. For each identified set of connections, the method computes a metric score that quantifies a quality of the identified set of connections. The method then selects one of the identified sets of connections to connect the configurable nodes in the array.

摘要翻译： 一些实施例提供了一种定义连接可配置节点阵列中的节点的一组连接的方法。 该方法识别用于连接一组节点的不同连接集。 对于每个确定的连接集合，该方法计算度量分数，其量化所识别的一组连接的质量。 然后，该方法选择一组已识别的连接以连接阵列中的可配置节点。

公开(公告)号：US08281273B2

公开(公告)日：2012-10-02

申请号：US12957389

申请日：2010-11-30

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F17/50

CPC分类号： H03K19/17708 ,  G06F17/5054 ,  G06F17/5077 ,  G06F2217/08

摘要： Some embodiments provide a method that defines a set of connections that connect the nodes in a configurable node array. The method identifies different sets of connections for connecting a set of the nodes. For each identified set of connections, the method computes a metric score that quantifies a quality of the identified set of connections. The method then selects one of the identified sets of connections to connect the configurable nodes in the array.

摘要翻译： 一些实施例提供了一种定义连接可配置节点阵列中的节点的一组连接的方法。 该方法识别用于连接一组节点的不同连接集。 对于每个确定的连接集合，该方法计算度量分数，其量化所识别的一组连接的质量。 然后，该方法选择一组已识别的连接以连接阵列中的可配置节点。

公开(公告)号：US20110145776A1

公开(公告)日：2011-06-16

申请号：US12965815

申请日：2010-12-10

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F17/50

CPC分类号： G06F17/5054 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.

摘要翻译： 一些实施例提供了一种用多个可配置电路设计可配置集成电路（“IC”）的方法。 该方法接收具有用于可配置电路的多组操作的设计以在不同的操作周期中执行的设计。 对于至少具有开始操作和结束操作的第一组操作，该方法至少部分地基于特定操作相对于开始的位置而将第一组中的特定操作分配到第一操作周期，以及 结束操作。

公开(公告)号：US07870530B2

公开(公告)日：2011-01-11

申请号：US12193713

申请日：2008-08-18

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F17/50

CPC分类号： G06F17/5054 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.

公开(公告)号：US07870529B2

公开(公告)日：2011-01-11

申请号：US12193712

申请日：2008-08-18

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F17/50

CPC分类号： G06F17/5054 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.

摘要翻译： 一些实施例提供了一种用多个可配置电路设计可配置集成电路（“IC”）的方法。 该方法接收具有用于可配置电路的多组操作的设计以在不同的操作周期中执行的设计。 对于至少具有开始操作和结束操作的第一组操作，该方法至少部分地基于特定操作相对于开始的位置而将第一组中的特定操作分配到第一操作周期，以及 结束操作。

公开(公告)号：US07737722B2

公开(公告)日：2010-06-15

申请号：US11945221

申请日：2007-11-26

申请人： Andre Rohe ,  Steven Teig

发明人： Andre Rohe ,  Steven Teig

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17736 ,  H03K19/17796

摘要： Some embodiments of the invention provide configurable integrated circuits (“IC's”) with configurable node arrays. In some embodiments, the configurable node array includes numerous (e.g., 50, 100, etc.) configurable nodes arranged in several rows and columns. This array also includes several direct offset connections, where each particular direct offset connection connects two nodes that are neither in the same column nor in the same row in the array. In some embodiments, at least some direct offset connections connect pairs of nodes that are separated in the array by more than one row and at least one column, or by more than one column and at least one row. Some embodiments establish a direct connection by (1) a set of wire segments that traverse through a set of the IC's wiring layers, and (2) a set of vias when two or more wiring layers are involved. In some embodiments, some of the direct connections have intervening circuits (e.g., buffer circuits), while other direct connections do not have any intervening circuits. Also, in some embodiments, the nodes in the configurable array are all similar (e.g., have the same set of circuit elements and same internal wiring between the circuit elements).

摘要翻译： 本发明的一些实施例提供具有可配置节点阵列的可配置集成电路（“IC”）。 在一些实施例中，可配置节点阵列包括以多行和列排列的许多（例如，50,100等）可配置节点。 该阵列还包括几个直接偏移连接，其中每个特定的直接偏移连接都连接两个不同于列的节点，也不在阵列中的同一行中。 在一些实施例中，至少一些直接偏移连接将在阵列中分离的多对节点连接多于一行和至少一列，或多于一列和至少一行。 一些实施例通过（1）一组穿过一组IC布线层的线段建立直接连接，以及（2）当涉及两个或多个布线层时的一组通孔。 在一些实施例中，一些直接连接具有中间电路（例如，缓冲电路），而其它直接连接不具有任何中间电路。 此外，在一些实施例中，可配置阵列中的节点都是相似的（例如，具有相同的电路元件组和电路元件之间的相同的内部布线）。