Phased array with low-latency control interface

    公开(公告)号:US11637371B2

    公开(公告)日:2023-04-25

    申请号:US17363829

    申请日:2021-06-30

    申请人: Anokiwave, Inc.

    IPC分类号: H01Q3/36 H01Q3/26 H04B7/08

    摘要: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.

    Cross-polarized time division duplexed antenna

    公开(公告)号:US11296426B2

    公开(公告)日:2022-04-05

    申请号:US17226887

    申请日:2021-04-09

    申请人: Anokiwave, Inc.

    摘要: A laminar phased array has a first sub-array configured to operate in one of a receive mode with a first polarity and a transmit mode with a second polarity, and a second sub-array configured to operate in one of a receive mode with the second polarity and a transmit mode with the first polarity. The first polarity is physically orthogonal to the second polarity. The array also has a controller configured to control the first and second sub-arrays so that they operate together in either 1) a receive mode or 2) a transit mode. Accordingly, both sub-arrays are configured to operate at the same time to receive signals in the first and second polarities when in the receive mode. In a corresponding manner, both sub-arrays are configured to operate at the same time to transmit signals in the first and second polarities when in the transmit mode.

    Method and apparatus for heat sinking high frequency IC with absorbing material

    公开(公告)号:US11177227B2

    公开(公告)日:2021-11-16

    申请号:US16886370

    申请日:2020-05-28

    申请人: Anokiwave, Inc.

    摘要: A phased array has a laminar substrate, a plurality of elements on the laminar substrate forming a patch phased array, and integrated circuits on the laminar substrate. Each integrated circuit is a high frequency integrated circuit configured to control receipt and/or transmission of signals by the plurality of elements in the patch phased array. In addition, each integrated circuit has a substrate side coupled with the laminar substrate, and a back side. The phased array also has a plurality of heat sinks. Each integrated circuit is coupled with at least one of the heat sinks. At least one of the integrated circuits has a thermal interface material in conductive thermal contact with its back side. The thermal interface material thus is between the at least one integrated circuit and one of the heat sinks. Preferably, the thermal interface material has a magnetic loss tangent value of between 0.5 and 4.5.

    Phased array with low-latency control interface

    公开(公告)号:US11081792B2

    公开(公告)日:2021-08-03

    申请号:US16501456

    申请日:2019-03-07

    申请人: Anokiwave, Inc.

    IPC分类号: H01Q3/26 H01Q3/36

    摘要: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.

    PHASED ARRAY CONTROL CIRCUIT FOR CONTROLLING THE EFFECTIVE SHAPE OF A BEAM-FORMED SIGNAL

    公开(公告)号:US20210075125A1

    公开(公告)日:2021-03-11

    申请号:US17099238

    申请日:2020-11-16

    申请人: Anokiwave, Inc.

    IPC分类号: H01Q21/22 H01Q3/26 H01Q3/24

    摘要: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.

    CROSS-POLARIZED TIME DIVISION DUPLEXED ANTENNA

    公开(公告)号:US20190356057A1

    公开(公告)日:2019-11-21

    申请号:US16413355

    申请日:2019-05-15

    申请人: Anokiwave, Inc.

    摘要: A laminar phased array has a first sub-array configured to operate in one of a receive mode with a first polarity and a transmit mode with a second polarity, and a second sub-array configured to operate in one of a receive mode with the second polarity and a transmit mode with the first polarity. The first polarity is physically orthogonal to the second polarity. The array also has a controller configured to control the first and second sub-arrays so that they operate together in either 1) a receive mode or 2) a transit mode. Accordingly, both sub-arrays are configured to operate at the same time to receive signals in the first and second polarities when in the receive mode. In a corresponding manner, both sub-arrays are configured to operate at the same time to transmit signals in the first and second polarities when in the transmit mode.