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公开(公告)号：US20190109537A1
公开(公告)日：2019-04-11
申请号：US16197711
申请日：2018-11-21
Applicant: Apple Inc.
Inventor： Fabio Ongaro , Michael Couleur
Abstract: Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop's response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.
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公开(公告)号：US10141841B1
公开(公告)日：2018-11-27
申请号：US15691472
申请日：2017-08-30
Applicant: Apple Inc.
Inventor： Fabio Ongaro , Michael Couleur
Abstract: Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop's response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.
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公开(公告)号：US20250105743A1
公开(公告)日：2025-03-27
申请号：US18473751
申请日：2023-09-25
Applicant: Apple Inc.
Inventor： Michael Couleur , Bhanupriya Suresh
Abstract: A power converter with a bootstrapped switch is disclosed. A power converter is configured to generate a regulated supply voltage and includes an inductor coupled between a ground node and a switching node. The power converter further includes a switch (e.g., a low-side switch) coupled between the switching node and a supply voltage node, wherein the power converter is configured to generate the supply voltage on the voltage node, and a capacitor, wherein a voltage rating of the capacitor is less than a magnitude of the voltage. The power converter also includes a control circuit configured to, during a first phase, cause the capacitor to accumulate a charge, and during a second phase, cause activation of the switch by causing the capacitor to transfer a portion of the charge to a parasitic capacitance of the switch.
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公开(公告)号：US20240088787A1
公开(公告)日：2024-03-14
申请号：US17931088
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic
IPC: H02M3/158
CPC classification number: H02M3/158
Abstract: A multi-level power converter circuit for computer systems maintains phase alignment with other power converter circuits by employing low-gain phase-locked loop circuits. In order to account for different voltage levels on its terminal nodes, the power converter circuit may perform a comparison of the respective voltage levels of its terminal nodes. Using results of the comparison, the power converter circuit can select different regulation modes using different ones of the low-gain phase-locked loop circuits.
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公开(公告)号：US11837955B2
公开(公告)日：2023-12-05
申请号：US17397781
申请日：2021-08-09
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Bhanupriya Suresh
CPC classification number: H02M3/158 , H02M1/0009
Abstract: A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.
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Patent Agency Ranking
公开(公告)号：US20230043741A1
公开(公告)日：2023-02-09
申请号：US17397781
申请日：2021-08-09
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Bhanupriya Suresh
Abstract: A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.
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公开(公告)号：US10707761B1
公开(公告)日：2020-07-07
申请号：US16394823
申请日：2019-04-25
Applicant: Apple Inc.
Inventor： Michael Couleur , Andrea Acquas , Nicola Rasera
Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. During a charge cycle, the power converter circuit may generate a reference ramp signal that has an initial voltage level greater than that of the switch node. The power converter may also generate a sense ramp signal using the voltage level of the switch node, and halt the charge cycle using results of a comparison of the respective voltage levels of the reference ramp signal and the sense ramp signal.
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公开(公告)号：US20190229622A1
公开(公告)日：2019-07-25
申请号：US16373616
申请日：2019-04-02
Applicant: Apple Inc.
Inventor： Michael Couleur , Fabio Ongaro , Nikola Jovanovic , Frank Trautmann
Abstract: An apparatus includes a plurality of pulse control circuits and a control circuit. A given pulse control circuit of the plurality of pulse control circuits may source a current pulse to the output power signal based on a comparison of a particular feedback signal of a plurality of feedback signals and a target voltage signal. The control circuit may offset a voltage level of each feedback signal of a first subset of the plurality of feedback signals. The first subset may exclude a first feedback signal. In response to a determination that a period of time has ended, the control circuit may offset a voltage level of each feedback signal of a second subset of the plurality of feedback signals. The second subset may include the first feedback signal and exclude a second feedback signal.
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公开(公告)号：US12212237B2
公开(公告)日：2025-01-28
申请号：US17974787
申请日：2022-10-27
Applicant: Apple Inc.
Inventor： Michael Couleur , Bogdan-Eugen Matei , Ming Sun , Bhanupriya Suresh
Abstract: The present disclosure describes a system with a first counter circuit, a first converter circuit, a second counter circuit, and a second converter circuit. The first counter circuit is configured to output a first count value based on a comparison between a first reference value and a switched node value of a voltage regulator. The first converter circuit is configured to adjust an activation time of the voltage regulator based on the first count value. The second counter circuit is configured to output a second count value based on a comparison between a second reference value and the switched node value of the voltage regulator. The second converter circuit is configured to adjust an amount of current drawn away from an output of the voltage regulator based on the second count value.
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公开(公告)号：US20210018543A1
公开(公告)日：2021-01-21
申请号：US16517402
申请日：2019-07-19
Applicant: Apple Inc.
Inventor： Michael Couleur , Andrea Acquas , Nikola Jovanovic
Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.
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