公开(公告)号：US09711243B1

公开(公告)日：2017-07-18

申请号：US15188876

申请日：2016-06-21

Applicant: ARM Limited

Inventor： Vivek Nautiyal ,  Fakhruddin Ali Bohra ,  Satinderjit Singh ,  Jitendra Dasani ,  Shri Sagar Dwivedi

IPC: G11C11/00 ,  G11C29/00 ,  G11C11/412 ,  G11C11/417

CPC classification number: G11C29/76 ,  G11C11/417 ,  G11C29/12 ,  G11C29/842 ,  G11C29/846

Abstract: Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a first memory cell array disposed in a first area of the integrated circuit. The first memory cell array includes first memory cells. The integrated circuit may include a second memory cell array disposed in a second area of the integrated circuit that is different than the first area. The second memory cell array includes redundant memory cells that are separate from the first memory cells.