Ultrasound devices
    11.
    发明授权

    公开(公告)号:US11986349B2

    公开(公告)日:2024-05-21

    申请号:US16401630

    申请日:2019-05-02

    Abstract: An ultrasound device is described. The ultrasound device may include a cavity, a membrane, and a sensing electrode. When an electrical signal is applied to the sensing electrode and a static bias is applied to the membrane, the membrane vibrates within the cavity and produces ultrasonic signals. The cavity, the membrane, and the sensing electrode may be considered a capacitive micromachined ultrasonic transducer (CMUT). The sensing electrode may be shaped as a ring, whereby the central portion of the sensing electrode is removed. Removal of the central portion of the sensing electrode may reduce the parasitic capacitance without substantially affecting the production of ultrasonic signals by the CMUT. This, in turn, can result in an increase in the signal-to-noise ratio (SNR) of the ultrasonic signals. The ultrasound device may further include a bond pad configured for wire bonding, and a trench electrically isolating the bond pad from the membrane.

    Ultrasound apparatuses and methods for fabricating ultrasound devices

    公开(公告)号:US11375980B2

    公开(公告)日:2022-07-05

    申请号:US16404672

    申请日:2019-05-06

    Abstract: Aspects of the technology described herein relate to an ultrasound device including a first die that includes an ultrasonic transducer, a first application-specific integrated circuit (ASIC) that is bonded to the first die and includes a pulser, and a second ASIC in communication with the second ASIC that includes integrated digital receive circuitry. In some embodiments, the first ASIC may be bonded to the second ASIC and the second ASIC may include analog processing circuitry and an analog-to-digital converter. In such embodiments, the second ASIC may include a through-silicon via (TSV) facilitating communication between the first ASIC and the second ASIC. In some embodiments, SERDES circuitry facilitates communication between the first ASIC and the second ASIC and the first ASIC includes analog processing circuitry and an analog-to-digital converter. In some embodiments, the technology node of the first ASIC is different from the technology node of the second ASIC.

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