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公开(公告)号:US20240049569A1
公开(公告)日:2024-02-08
申请号:US17640530
申请日:2021-04-29
Inventor: Pan Xu , Zhidong Yuan , Yongqian Li , Can Yuan
IPC: H10K59/80 , H10K59/124 , H10K59/12
CPC classification number: H10K59/873 , H10K59/124 , H10K59/80523 , H10K59/1201
Abstract: Provided are a display panel and a method for manufacturing the same, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a separator located at the peripheral area and including at least one separation portion, each separation portion including a first and a second separation layer, and the orthographic projection of the first separation layer on the base substrate is within that of the second separation layer; a cathode including: a first cathode portion, and a second cathode apart from the first cathode portion; and an encapsulation layer including a first and a second inorganic layer, and an organic layer located between the first and the second inorganic layer, wherein edges of the orthographic projections of the first inorganic layer, the organic layer, and the second inorganic layer on the base substrate overlap.
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12.
公开(公告)号:US11562673B2
公开(公告)日:2023-01-24
申请号:US17015475
申请日:2020-09-09
Inventor: Xuehuan Feng , Pan Xu
Abstract: The present disclosure relates to the field of display technology and, in particular, to a gate driving structure, an array substrate, and a display device. The gate driving structure may include: a base substrate; a shift register formed on the base substrate, and including a plurality of thin film transistors and at least one capacitor, the capacitor being coupled to the thin film transistor; and a signal wiring group formed on the base substrate, and including a plurality of signal wirings spaced apart from each other, the signal wiring being coupled to the thin film transistor. An orthographic projection of the capacitor on the base substrate is at least partially overlapped with an orthographic projection of the signal wiring group on the base substrate.
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公开(公告)号:US11437440B2
公开(公告)日:2022-09-06
申请号:US16963346
申请日:2019-09-27
Inventor: Can Yuan , Yongqian Li , Pan Xu , Zhidong Yuan , Meng Li , Xuehuan Feng , Zehua Ding
IPC: H01L29/08 , H01L27/32 , G09G3/3225
Abstract: An array substrate includes an array of a plurality of subpixels including a plurality of columns of subpixels respectively spaced apart by a plurality of inter-subpixel regions; a plurality of pixel driving circuits respectively driving light emission of the plurality of subpixels; and a plurality of detection and compensation lead lines respectively configured to respectively detect signals in the plurality of subpixels and respectively compensate signals in the plurality of subpixels. A respective one of a plurality of detection and compensation lead lines is disposed in a first inter-subpixel region between two directly adjacent columns of subpixels. The respective one of the plurality of detection and compensation lead lines is spaced apart by at least one columns of subpixels from a signal line configured to transmit an alternating current and arranged along a direction parallel to the respective one of the plurality of detection and compensation lead lines.
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公开(公告)号:US11361715B1
公开(公告)日:2022-06-14
申请号:US17352319
申请日:2021-06-20
Inventor: Xuehuan Feng , Yongqian Li , Pan Xu
IPC: G09G3/36 , G09G3/3266 , G09G3/3225 , G11C19/28 , H03K19/20
Abstract: The present disclosure provides a shift register unit, a gate driving circuitry and a method for driving the gate driving circuitry. The shift register unit includes an input circuitry, a first latch circuitry, a second latch circuitry and an output end. The input circuitry is configured to output an input control signal to the first latch circuitry in accordance with a first level signal, a second level signal and a first ON signal. The first latch circuitry is configured to output an output signal as a gate driving signal via the output end in accordance with a first clock signal and the input control signal, and latch the output signal. The second latch circuitry is configured to output a second ON signal in accordance with a second clock signal and the output signal, and latch the second ON signal.
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公开(公告)号:US11341923B2
公开(公告)日:2022-05-24
申请号:US17206121
申请日:2021-03-19
Inventor: Zhidong Yuan , Pan Xu , Yongqian Li , Can Yuan
IPC: G09G3/3266 , G11C19/28 , G09G3/3233
Abstract: The present disclosure relates to the field of display technology, and provides a shift register unit and a driving method thereof, a gate driving circuit, and a display panel. The shift register unit includes: an input circuit, a charging circuit, an inverter circuit, an output circuit, and a pull-down circuit. The input circuit is connected to a second clock signal terminal, a signal input terminal and a first node. The inverter circuit is connected to the signal input terminal, the second clock signal terminal, a first power supply terminal, a second power supply terminal and a pull-down node. The output circuit is connected to the pull-up node, the first power supply terminal and an output terminal. The pull-down circuit is connected to the pull-down node, the second power supply terminal, the pull-up node, and the output terminal.
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公开(公告)号:US11282907B2
公开(公告)日:2022-03-22
申请号:US16884461
申请日:2020-05-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ying Han , Yicheng Lin , Pan Xu , Ling Wang , Guoying Wang , Xing Zhang
Abstract: The pixel substrate and a pixel panel are provided. The display substrate includes: a display structure layer, a cover plate on the display structure layer and a plurality of pixel definition layers and an anti-light crosstalk layer between the display structure layer and the cover plate, where the pixel definition layers are arranged on a lower surface of the cover plate at intervals and are in a one-to-one correspondence to sub-pixel units of the display substrate, the anti-light crosstalk layer surrounds each pixel definition layer, where a reflective component is between the anti-light crosstalk layer and the display structure layer, the reflective component includes an inclined surface configured to reflect light from the display structure layer to the pixel definition layer.
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17.
公开(公告)号:US11139357B2
公开(公告)日:2021-10-05
申请号:US16499809
申请日:2019-04-01
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Pan Xu , Yicheng Lin , Cuili Gai , Ling Wang , Yongqian Li
IPC: H01L27/32 , H01L51/56 , H01L27/12 , H01L29/786
Abstract: An OLED display substrate, a manufacturing method thereof, and a display device are provided. The manufacturing method includes forming a PIN photodiode on a base substrate, forming an insulative protection layer covering the PIN photodiode, and forming an oxide TFT. The PIN photodiode is formed prior to the formation of an active layer of the oxide TFT, and the insulative protection layer covering the PIN photodiode is formed prior to the formation of a source electrode and a drain electrode of the oxide TFT.
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公开(公告)号:US11133367B2
公开(公告)日:2021-09-28
申请号:US16619446
申请日:2019-05-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ling Wang , Yicheng Lin , Cuili Gai , Pan Xu
IPC: H01L27/32 , H01L29/786 , H01L29/417 , H01L23/522 , H01L27/12 , H01L29/66
Abstract: A thin film transistor includes: a substrate base; a first gate electrode at a side of the substrate base; an active layer at a side of the first gate electrode away from the substrate base; a second gate electrode at a side of the active layer away from the substrate base; and a source/drain electrode at a side of the second gate electrode away from the substrate base. An orthographic projection of the source/drain electrode on the substrate base is at least partially overlapped with an orthographic projection of the second gate electrode on the substrate base.
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公开(公告)号:US20210201776A1
公开(公告)日:2021-07-01
申请号:US16063932
申请日:2017-11-21
Inventor: Can Yuan , Yongqian Li , Pan Xu , Zhidong Yuan , Zhenfei Cai
IPC: G09G3/3233
Abstract: The present application discloses a pixel circuit, including a data-input sub-circuit configured to apply a data voltage from the data line to a first node; a reset sub-circuit configured to reset the second node; a driving-control sub-circuit coupled to a first power supply, the first node, and the second node; a power-storage sub-circuit configured to regulate a voltage difference between the first node and the second node; a light-emitting device coupled to the second node and a second power supply; and a sampling sub-circuit coupled to the data line and the second node and being configured to control the data line to connect with the second node for collecting a voltage signal containing information about electrical properties of the driving-control sub-circuit and being used to generating a compensation voltage for compensating any drifts of the electrical properties.
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20.
公开(公告)号:US10997913B2
公开(公告)日:2021-05-04
申请号:US16453233
申请日:2019-06-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Dongxu Han , Tieshi Wang , Zhongyuan Wu , Yongqian Li , Chi Zhang , Jinxia Hu , Wei Chen , Pan Xu
IPC: G06F3/038 , G09G3/3233
Abstract: The present disclosure relates to a method and an apparatus for controlling a drive current of a display panel, an electronic device, and a storage medium. A standard drive current of the display panel is calculated based on the power function of the display panel. An actual drive current is detected in a working process of the display panel, and it is determined whether the actual drive current exceeds the standard by comparing the actual drive current with the standard drive current. The actual drive current is regulated if the actual drive current exceeds the standard.
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