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公开(公告)号：US20210408095A1
公开(公告)日：2021-12-30
申请号：US17290495
申请日：2020-09-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Tianmin ZHOU , Rui HUANG , Wei YANG , Lizhong WANG , Zhaohui QIANG , Tao YANG , Li QIANG
IPC: H01L27/146 , H01L27/32 , H01L51/56 , G06K9/00
Abstract: The present disclosure provides an array substrate, an electronic device and a manufacturing method of the array substrate. The array substrate includes a base substrate, and a first transistor and a second transistor on the base substrate, a first electrode of the first transistor being connected to a second electrode of the second transistor; the array substrate further includes a photodiode including a first electrode, a second electrode, and a photosensitive layer between the first electrode and the second electrode, and the first electrode is electrically connected to a gate of the first transistor. In the arrangement, the first transistor and the second transistor are connected in series to form one control unit, and the uniformity and stability of the control unit are greatly improved.
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公开(公告)号：US20210088835A1
公开(公告)日：2021-03-25
申请号：US16819340
申请日：2020-03-16
Inventor： Hailong WEN , Tao ZHU , Tao YANG , Lixing ZHAO , Shengguang WANG , Shuang LIU , Xiaoxiao FAN
IPC: G02F1/1335 , G02F1/1339
Abstract: The present disclosure relates to a display panel, a color film substrate, and a manufacturing method thereof, and relates to the field of display technology. The color film substrate includes a substrate, a light-shielding layer, a filter layer, a transparent flat layer, and a spacer layer. The filter layer covers first areas of the light-shielding layer. The transparent flat layer has a flat area and a recessed area, where the flat area covers the filter layer and the recessed area covers second area of the light-shielding layer. The spacer layer includes a first spacer in the flat area and a second spacer in the recessed area, and a thickness of the first spacer and a thickness of the second spacer are the same.
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13.发明申请公开(公告)号：US20180024390A1
公开(公告)日：2018-01-25
申请号：US15540422
申请日：2016-12-05
Inventor： Kun YU , Changdi CHEN , Qingyong MENG , Tao YANG , Shengchao JIANG , Yusheng AN , Chunhui WU
IPC: G02F1/13 , G02F1/1333 , G02F1/1335 , G02F1/1339
CPC classification number: G02F1/1309 , G02F1/133308 , G02F1/133351 , G02F1/133512 , G02F1/133514 , G02F1/13394
Abstract: A display substrate motherboard and a manufacturing method and a detecting method thereof are provided. The display substrate motherboard includes a base substrate, a plurality of display substrate regions located on the base substrate to form a plurality of display substrates, and a plurality of spacer regions located among the display substrate regions, at least one detecting region being disposed in the spacer regions. The detecting region includes at least one film layer. The display substrate region includes at least one film layer which is disposed in a same layer as the at least one film layer of the detecting region, the film layer of the detecting region having a same thickness as the film layers in the display substrate regions.
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14.发明申请公开(公告)号：US20170365807A1
公开(公告)日：2017-12-21
申请号：US15697872
申请日：2017-09-07
Inventor： Changdi CHEN , Sangman YUK , Yiyong LUO , Tao YANG
CPC classification number: H01L51/5024 , H01L51/0081 , H01L51/0085 , H01L51/0093 , H01L51/5016 , H01L51/5253
Abstract: The present invention, which belongs to the technical field of display technology, provides a microcapsule, a method of preparing the same, and an OLED (organic light emitting diode) display device comprising the same. The OLED display device comprises a microcapsule having a phosphorescent material as a core material, which reduces the probability of the phosphorescence self-quenching and is isolated from water and oxygen, thereby improving the display quality and extending the service life of the OLED display device. Therefore, the OLED display device can solve the problem that the phosphorescence OLED display device in the prior art has a low brightness and short service life.
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公开(公告)号：US20170160555A1
公开(公告)日：2017-06-08
申请号：US15021864
申请日：2015-11-02
Inventor： Changdi CHEN , Yiyong LUO , Tao YANG
IPC: G02B27/22
CPC classification number: G02B27/2214 , G02B27/22 , H04N13/31
Abstract: The present disclosure provides a parallax barrier and a display device. The parallax barrier is configured to achieve 3D display using a slit grating, and includes a plurality of first stripes separated from, and arranged parallel to, each other, and a plurality of second stripes each arranged between the adjacent first stripes. Each first stripe has light transmittance greater than zero and less than that of the light-transmissible stripe.
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Patent Agency Ranking
公开(公告)号：US20240274099A1
公开(公告)日：2024-08-15
申请号：US18642704
申请日：2024-04-22
Inventor： Tao YANG , Yingmeng MIAO , Dongchuan CHEN , Yue YANG
IPC: G09G3/36 , G09G3/3266 , G11C19/28
CPC classification number: G09G3/3677 , G09G3/3266 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G11C19/28
Abstract: An array substrate includes a gate drive circuit including shift register units in cascade. The driving method includes: in a first driving mode, loading a first clock signal with an active level and an inactive level alternating periodically to a cascade clock signal terminal of a shift register unit, and loading a second clock signal with an active level and an inactive level alternating periodically to any one of K drive clock signal terminals of the shift register unit; and in a second driving mode, loading the first clock signal to the cascade clock signal terminal, and loading a third clock signal with an active level appearing within a target time period to a target drive clock signal terminal among the K drive clock signal terminals so that a target drive output terminal corresponding to the target drive clock signal terminal outputs a gate turn-on signal.
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公开(公告)号：US20240212579A1
公开(公告)日：2024-06-27
申请号：US17920347
申请日：2021-11-26
Inventor： Shicai CAO , Zhitao ZHANG , Xiurong WANG , Tao YANG , Mengmeng WANG
CPC classification number: G09G3/32 , G09G3/3426 , G09G2300/0828 , G09G2320/0276 , G09G2330/021
Abstract: The present disclosure provides a drive circuit of a display panel, a method for driving the same, and a display device, and relates to the field of display technologies. The drive circuit includes: a power supply circuit, an adapter circuit board, and a voltage regulation circuit. The adapter circuit board transmits a power supply voltage supplied by the power supply circuit to light-emitting elements in the display panel. The voltage regulation circuit regulates, based on an ideal operating voltage of the light-emitting element under a certain grayscale and a wiring voltage drop on a wiring coupled to the light-emitting element, the power supply voltage supplied by the power supply circuit. That is, the voltage regulation circuit flexibly regulates, based on a grayscale of a screen displayed by the display panel, the power supply voltage supplied by the power supply circuit to the light-emitting element. In this way, the operating power consumption of the display panel is effectively reduced, and the product yield is further improved.
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公开(公告)号：US20170279075A1
公开(公告)日：2017-09-28
申请号：US15504126
申请日：2016-07-28
Inventor： Changdi CHEN , Tao YANG
IPC: H01L51/52 , H01L51/56 , H01L27/32 , G02F1/1339
CPC classification number: H01L51/5246 , G02F1/1339 , H01L27/32 , H01L51/5253 , H01L51/5271 , H01L51/56 , H01L2251/566
Abstract: A sealant, a display panel and a display device are provided. The sealant includes: a main body material and a reflective material distributed in the main body material. In the case that the display device adopts the sealant, due to the scattering effect of the reflective material, the light incident onto the sealant is scattered by the reflective material and the light scattered by the reflective material cannot be continuously propagated along an original total reflection propagation direction, so that the light, which is originally totally reflected, emerges from the display panel, and thus the light extraction efficiency of the display panel is improved.
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公开(公告)号：US20160018575A1
公开(公告)日：2016-01-21
申请号：US14430024
申请日：2014-06-30
Inventor： Changdi CHEN , Xiangwan LU , Yiyong LUO , Tao YANG
IPC: G02B5/20
CPC classification number: G02B5/201 , G02F1/133514 , G02F2201/52 , H01L27/3213 , H01L27/322
Abstract: A color filter and a fabricating method thereof, and a display apparatus are provided. The color filter includes: at least four pixel units, and each pixel unit includes a color filter layer, and the four pixel units are a first pixel unit, a second pixel unit, a third pixel unit and a fourth pixel unit, respectively. A first color filter layer is formed in the first pixel unit, a second color filter layer is formed in the second pixel unit, a third color filter layer is formed in the third pixel unit, a fourth color filter layer is formed in the fourth pixel unit, and the fourth color filter layer is formed by stacking any two materials of the first, second and third color filter layers.
Abstract translation: 提供一种滤色器及其制造方法以及显示装置。 滤色器包括：至少四个像素单位，并且每个像素单元包括滤色器层，并且四个像素单元分别是第一像素单元，第二像素单元，第三像素单元和第四像素单元。 在第一像素单元中形成第一滤色器层，在第二像素单元中形成第二滤色器层，在第三像素单元中形成第三滤色器层，在第四像素中形成第四滤色器层 单元，并且通过堆叠第一，第二和第三滤色器层的任何两种材料形成第四滤色器层。
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公开(公告)号：US20240347545A1
公开(公告)日：2024-10-17
申请号：US18644017
申请日：2024-04-23
Inventor： Wenjie HOU , Yingmeng MIAO , Dongchuan CHEN , Tao YANG , Yue YANG
IPC: H01L27/12
CPC classification number: H01L27/124
Abstract: Disclosed are an array substrate and a display apparatus. The array substrate includes a substrate; a gate line layer; an insulating layer; a first electrode, arranged on a side of the insulating layer facing away from the gate line layer, and including a first electrode sub-portion and a second electrode sub-portion connected with the first electrode sub-portion, an orthographic projection of the first electrode sub-portion on the substrate partially overlaps with an orthographic projection of the gate line on the substrate, and the first electrode sub-portion is electrically connected with the gate line through the first via hole; and an active layer, an orthographic projection of the second electrode sub-portion on the substrate overlaps with an orthographic projection of the active layer on the substrate, and the orthographic projection of the active layer on the substrate does not overlap with the orthographic projection of the gate line on the substrate.
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