公开(公告)号：US20110003459A1

公开(公告)日：2011-01-06

申请号：US12613708

申请日：2009-11-06

申请人： Jong-Han Shin ,  Jum-Yong Park

发明人： Jong-Han Shin ,  Jum-Yong Park

IPC分类号： H01L21/28 ,  H01L21/762

CPC分类号： H01L21/28017 ,  H01L27/105 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10894 ,  H01L27/10897 ,  H01L29/4236

摘要： A method for fabricating a semiconductor device is provided, the method includes forming a plug conductive layer over an entire surface of a substrate, etching the plug conductive layer to form landing plugs, etching the substrate between the landing plugs to form a trench, forming a gate insulation layer over a surface of the trench and forming a buried gate partially filling the trench over the gate insulation layer.

摘要翻译： 提供一种制造半导体器件的方法，该方法包括在衬底的整个表面上形成插头导电层，蚀刻插头导电层以形成着陆塞，蚀刻层压塞之间的衬底以形成沟槽，形成 栅极绝缘层，并且形成在门绝缘层上部分地填充沟槽的掩埋栅极。