公开(公告)号：US08115754B2

公开(公告)日：2012-02-14

申请号：US12413835

申请日：2009-03-30

Applicant: Chung-Lin Fu ,  Fu-Yuan Liou ,  Yu-Hsin Ting ,  Shu-Huan Hsieh

Inventor： Chung-Lin Fu ,  Fu-Yuan Liou ,  Yu-Hsin Ting ,  Shu-Huan Hsieh

IPC: G06F3/038

CPC classification number: G09G3/3611 ,  G09G2310/0202 ,  G09G2310/0224 ,  G09G2320/0209

Abstract: A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.

Abstract translation: 提供一种适用于显示面板驱动电路的数据线驱动方法。 显示面板驱动电路包括多行栅极线和多个对应于数据线组的数据驱动器级，其中数据线驱动方法包括以下步骤：以第一顺序接通数据驱动器级，以 在第一帧周期内的每个栅极线激活时间内，在对应于数据驱动器级的数据线组中输入第一帧数据; 并以与第一顺序顺序相反的第二顺序顺序接通数据驱动器级，以在第二帧周期内的每个栅极线激活时间内输入与数据驱动器级对应的数据线组中的第二帧数据; 其中第一和第二帧周期是彼此相邻的两个隔行周期。

公开(公告)号：US20100110045A1

公开(公告)日：2010-05-06

申请号：US12413835

申请日：2009-03-30

Applicant: Chung-Lin Fu ,  Fu-Yuan Liou ,  Yu-Hsin Ting ,  Shu-Huan Hsieh

Inventor： Chung-Lin Fu ,  Fu-Yuan Liou ,  Yu-Hsin Ting ,  Shu-Huan Hsieh

IPC: G06F3/038

CPC classification number: G09G3/3611 ,  G09G2310/0202 ,  G09G2310/0224 ,  G09G2320/0209

Abstract: A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.

Abstract translation: 提供一种适用于显示面板驱动电路的数据线驱动方法。 显示面板驱动电路包括多行栅极线和多个对应于数据线组的数据驱动器级，其中数据线驱动方法包括以下步骤：以第一顺序接通数据驱动器级，以 在第一帧周期内的每个栅极线激活时间内，在对应于数据驱动器级的数据线组中输入第一帧数据; 并以与第一顺序顺序相反的第二顺序顺序接通数据驱动器级，以在第二帧周期内的每个栅极线激活时间内输入与数据驱动器级对应的数据线组中的第二帧数据; 其中第一和第二帧周期是彼此相邻的两个隔行周期。

公开(公告)号：US08836679B2

公开(公告)日：2014-09-16

申请号：US13567582

申请日：2012-08-06

Applicant: Nan-Ying Lin ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Wei-Chun Hsu ,  Pei-Hua Chen

Inventor： Nan-Ying Lin ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Wei-Chun Hsu ,  Pei-Hua Chen

IPC: G09G5/00 ,  G09G3/36

CPC classification number: G09G3/3611 ,  G09G3/3685 ,  G09G2310/0297

Abstract: In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.

Abstract translation: 一方面，LCD包括具有M条扫描线和N条数据线的像素矩阵的显示面板和多路复用器馈通补偿电路，其包括用于提供P视频信号的P信号线，P多路复用器和K对 提供K对控制信号的控制线。 每个复用器电耦合到对应的信号线并且具有K个信道。 每个通道包括并联在信号线和相应的数据线之间的第一和第二开关，用于选择性地将视频信号传输到对应的数据线。 每对控制线分别电耦合到每个多路复用器的相应通道的第一和第二开关。 每对控制信号被配置为使得关闭第一和第二开关中的一个的时间早于关闭另一个开关的时间。

公开(公告)号：US20120146962A1

公开(公告)日：2012-06-14

申请号：US13087328

申请日：2011-04-14

Applicant: Wei-Chun Hsu ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Tsao-Wen Lu ,  Nan-Ying Lin ,  Pei-Hua Chen

Inventor： Wei-Chun Hsu ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Tsao-Wen Lu ,  Nan-Ying Lin ,  Pei-Hua Chen

IPC: G09G3/36 ,  G09G5/00

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2320/0214

Abstract: An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.

Abstract translation: 有源液晶显示面板包括像素阵列，栅极驱动电路，数据驱动电路和模拟缓冲器。 栅极驱动电路用于驱动M是自然数的M个第一扫描线。 模拟缓冲器耦合到栅极驱动电路，并包括M个缓冲电路和调节器。 每个缓冲电路根据M个第一扫描线的对应的第一扫描线的输出信号驱动相应的第二扫描线，并且调节器用于保持提供给M个缓冲电路的至少一个参考电压。

公开(公告)号：US20120104402A1

公开(公告)日：2012-05-03

申请号：US12938867

申请日：2010-11-03

Applicant: Pei-Hua Chen ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Tsao-Wen Lu ,  Nan-Ying Lin ,  Wei-Chun Hsu

Inventor： Pei-Hua Chen ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Tsao-Wen Lu ,  Nan-Ying Lin ,  Wei-Chun Hsu

IPC: H01L27/12

CPC classification number: H01L27/124

Abstract: In one aspect of the invention, an analog buffer circuit includes a p-channel field effect transistor (PTFT) and an n-channel field effect transistor (NTFT). Each of the PTFT and NTFT has a source region and a drain region defining a channel region therebetween, formed on a substrate such that the drain regions of the PTFT and the NTFT are in substantial contact with each other, a gate layer formed over and insulated from the corresponding channel region, a source electrode insulated from the gate layer and electrically connected to the corresponding source region, and a common drain electrode insulated from the gate layer and the source electrode, and is electrically connected to the drain regions of both the PTFT and the NTFT through a via defined over the depletion region.

Abstract translation: 在本发明的一个方面，模拟缓冲电路包括p沟道场效应晶体管（PTFT）和n沟道场效应晶体管（NTFT）。 PTFT和NTFT中的每一个具有形成在基板上的源极区域和限定其间的沟道区域的漏极区域，使得PTFT和NTFT的漏极区域彼此基本接触;形成在绝缘层上的栅极层 从相应的沟道区域，与栅极层绝缘并电连接到对应的源极区域的源极电极和与栅极层和源极电极绝缘的公共漏电极，并且电连接到两个PTFT的漏极区域 和通过在耗尽区域上定义的通孔的NTFT。

公开(公告)号：US08982031B2

公开(公告)日：2015-03-17

申请号：US13610900

申请日：2012-09-12

Applicant: Yi-Xuan Hung ,  Yu-Hsin Ting ,  Chen-Ming Chen ,  Szu-Chieh Chen ,  Da-Wei Fan ,  Chung-Lin Fu

Inventor： Yi-Xuan Hung ,  Yu-Hsin Ting ,  Chen-Ming Chen ,  Szu-Chieh Chen ,  Da-Wei Fan ,  Chung-Lin Fu

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0218 ,  G09G2310/0275 ,  G09G2310/0281 ,  G09G2310/0297

Abstract: A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.

Abstract translation: 显示面板包括安装在显示面板的第一侧的多个第一驱动开关，安装在显示面板的第二侧的多个第二开关，多个第一数据线，多条第二数据线， 多个扫描线，以及多个像素。 每个第一驱动开关包括第一输入端和多个第一输出端。 每个第二驱动开关包括第二输入端和多个第二输出端。 第一数据线电连接到第一输出端。 第二数据线电连接到第二输出端。 多个像素电连接到多个第一数据线，第二数据线和用于显示图像的扫描线。 第一数据线和第二数据线被交错布置。

公开(公告)号：US20140035896A1

公开(公告)日：2014-02-06

申请号：US13567582

申请日：2012-08-06

Applicant: Nan-Ying Lin ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Wei-Chun Hsu ,  Pei-Hua Chen

Inventor： Nan-Ying Lin ,  Yu-Hsin Ting ,  Chung-Lin Fu ,  Wei-Chun Hsu ,  Pei-Hua Chen

IPC: G06F3/038

CPC classification number: G09G3/3611 ,  G09G3/3685 ,  G09G2310/0297

Abstract: In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.

Abstract translation: 一方面，LCD包括具有M条扫描线和N条数据线的像素矩阵的显示面板和多路复用器馈通补偿电路，其包括用于提供P视频信号的P信号线，P多路复用器和K对 提供K对控制信号的控制线。 每个复用器电耦合到对应的信号线并且具有K个信道。 每个通道包括并联在信号线和相应的数据线之间的第一和第二开关，用于选择性地将视频信号传输到对应的数据线。 每对控制线分别电耦合到每个多路复用器的相应通道的第一和第二开关。 每对控制信号被配置为使得关闭第一和第二开关中的一个的时间早于关闭另一个开关的时间。

公开(公告)号：US20130127801A1

公开(公告)日：2013-05-23

申请号：US13610900

申请日：2012-09-12

Applicant: Yi-Xuan Hung ,  Yu-Hsin Ting ,  Chen-Ming Chen ,  Szu-Chieh Chen ,  Da-Wei Fan ,  Chung-Lin Fu

Inventor： Yi-Xuan Hung ,  Yu-Hsin Ting ,  Chen-Ming Chen ,  Szu-Chieh Chen ,  Da-Wei Fan ,  Chung-Lin Fu

IPC: G06F3/038

CPC classification number: G09G3/20 ,  G09G2310/0218 ,  G09G2310/0275 ,  G09G2310/0281 ,  G09G2310/0297

Abstract: A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.

Abstract translation: 显示面板包括安装在显示面板的第一侧的多个第一驱动开关，安装在显示面板的第二侧的多个第二开关，多个第一数据线，多个第二数据线， 多个扫描线，以及多个像素。 每个第一驱动开关包括第一输入端和多个第一输出端。 每个第二驱动开关包括第二输入端和多个第二输出端。 第一数据线电连接到第一输出端。 第二数据线电连接到第二输出端。 多个像素电连接到多个第一数据线，第二数据线和用于显示图像的扫描线。 第一数据线和第二数据线被交错布置。