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公开(公告)号：US20240355304A1
公开(公告)日：2024-10-24
申请号：US18638611
申请日：2024-04-17
Applicant: LAPIS Technology Co., Ltd.
Inventor： Hiroaki ISHII
IPC: G09G3/36
CPC classification number: G09G3/3685 , G09G2370/10 , G09G2370/14
Abstract: A display device includes a display panel, a gate driver; a source driver, supplying gradation voltage signals to multiple pixel parts via multiple data lines based on a video data signal, and supplying to the gate driver a gate control signal; and a video data transmission part, transmitting the video data signal to the source driver by using LVDS. The video data transmission part assigns, to an empty region that is a region other than regions assigned to multiple pixel data pieces forming one pixel of the video data signal in each data packet defined for a time of transmitting the video data signal for one pixel by using LVDS, an arithmetic value calculated based on the pixel data pieces, and transmits to the source driver together with the pixel data pieces as the video data signal.
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公开(公告)号：US20240304126A1
公开(公告)日：2024-09-12
申请号：US18595359
申请日：2024-03-04
Applicant: LAPIS Technology Co., Ltd.
Inventor： Keita WATANABE
CPC classification number: G09G3/006 , G09G3/36 , G09G3/3685 , G09G2310/0289 , G09G2310/0291 , G09G2330/04 , G09G2330/08 , G09G2330/12
Abstract: Disclosed are a display driving device and a display device that are capable of operating normally even when noise occurs. The display driving device includes: a logic circuit including a register configured to store a register value, a backup memory configured to store the register value stored in the register, a noise detector configured to detect noise that occurs in the logic circuit, and a change part configured to change the register value stored in the register to the register value stored in the backup memory in response to noise being detected by the noise detector.
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公开(公告)号：US12087243B2
公开(公告)日：2024-09-10
申请号：US18086518
申请日：2022-12-21
Applicant: Joulwatt Technology Co., Ltd.
Inventor： Pitleong Wong , Duo Li
CPC classification number: G09G3/342 , G09G3/2096 , G09G3/3685 , G09G3/36 , G09G2320/0626 , G09G2330/026
Abstract: A light source driving circuit and a communication device for a display system are provided. The communication device includes a control unit and at least one string light source driving circuit. The control unit includes an output interface for transmitting the control commands or data and a reading back data input interface. Each string light source driving circuit includes a plurality of light source driving circuits. The control unit transmits the control commands or data to the first light source driving circuit of each string light source driving circuit through the output interface. The first driving circuit takes out the commands or data required at the current stage after receiving the control command or data, and then repackages the commands or data of the remaining driving circuits, and transmits the repackaged data packet through the serial output interface and the parallel interfaces or the parallel interfaces.
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公开(公告)号：US20240256070A1
公开(公告)日：2024-08-01
申请号：US18632987
申请日：2024-04-11
Applicant: Japan Display Inc.
Inventor： Koji Noguchi , Yoshitoshi Kida , Kohei Azumi
CPC classification number: G06F3/0412 , G06F3/04166 , G06F3/0418 , G06F3/04184 , G06F3/0445 , G06F3/0446 , G06F3/047 , G09G3/36 , G09G3/3677 , G09G5/003 , G09G5/18 , G09G3/3685 , G09G2300/0426 , G09G2310/0202 , G09G2310/0297 , G09G2310/08
Abstract: A display device is provided and includes signal line; pixel electrode; drive electrode opposed to pixel electrode; scanning lines; and display periods and a detection period in frame, wherein during one of display periods, common voltage is applied to drive electrode, scanning signal is applied to some scanning lines, pixel signal is applied to pixel electrode, wherein, during detection period, AC drive or pulse signal is applied to drive electrode, AC drive or pulse signal having pulses, wherein pulses during the detection period is less than number of some of scanning signal lines.
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公开(公告)号：US12039951B2
公开(公告)日：2024-07-16
申请号：US17900570
申请日：2022-08-31
Applicant: HYPHY USA Inc.
Inventor： Alex Henzen , Todd Rockoff
CPC classification number: G09G3/3685 , G09G3/2096 , G09G3/3674 , G09G2310/0289 , G09G2310/0291 , G09G2310/0294 , G09G2330/021 , G09G2360/08
Abstract: A video display includes a display panel with gate drivers and source drivers. Each of said the source drivers is arranged to receive a discrete-time continuous-amplitude signal representing a video stream over a transmission medium and to decode the signal using demodulation to produce a plurality of samples for output on outputs of the source drivers. At least one of the source drivers is arranged to extract a gate driver timing control signal from the signal and to output the gate driver control signal to the gate drivers in order to synchronize the gate drivers with outputs of the source drives, whereby the video stream is displayed on the display panel of the display unit.
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Patent Agency Ranking
公开(公告)号：US11990103B2
公开(公告)日：2024-05-21
申请号：US18187460
申请日：2023-03-21
Applicant: LAPIS Technology Co., Ltd.
Inventor： Yukinobu Watanabe
CPC classification number: G09G3/3685 , G09G3/006 , G09G3/2096 , G09G3/3688 , G09G3/3696 , G09G2310/08 , G09G2330/12 , G09G2370/08 , G09G2370/14
Abstract: An interface circuit comprises a timing signal generating unit that generates a timing signal indicating a timing to switch between a data input period and a non-input period, a plurality of driver error detection circuits that detects an error in source drivers, a selector circuit that selects one of the driver error detection circuits in the non-input period and that outputs a driver error detection signal indicating an error detection result, an input error detection circuit that detects an input error of a data signal and outputs an input error detection signal indicating the result, an OR circuit that outputs an OR of the driver error detection signal and the input error detection signal, and a signal output unit connected to an output part of the OR circuit.
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公开(公告)号：US11971638B2
公开(公告)日：2024-04-30
申请号：US17541423
申请日：2021-12-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Atsushi Umezaki
IPC: G09G3/36 , G02F1/133 , G02F1/1345 , G02F1/1362 , G02F1/1368 , G09G3/34 , G11C19/28 , H01L27/06 , H01L27/12 , H01L27/15 , H01L29/24 , H01L29/786 , G02F1/1335 , G02F1/1337 , G02F1/139 , H01L21/67 , H10K50/842 , H10K59/121 , H10K59/123 , H10K59/124 , H10K59/131 , H10K59/35 , H10K71/00 , H10K102/00
CPC classification number: G02F1/136286 , G02F1/13306 , G02F1/13452 , G02F1/136213 , G02F1/1368 , G09G3/342 , G09G3/3674 , G09G3/3677 , G09G3/3685 , G11C19/28 , H01L27/06 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L27/15 , H01L27/156 , H01L29/247 , H01L29/78693 , G02F1/133622 , G02F1/133753 , G02F1/1393 , G02F2202/103 , G09G3/3655 , G09G2300/0426 , G09G2300/0452 , G09G2310/024 , G09G2310/0286 , G09G2310/08 , G09G2320/0252 , G09G2330/021 , H01L21/67167 , H10K50/8426 , H10K59/1213 , H10K59/1216 , H10K59/123 , H10K59/124 , H10K59/131 , H10K59/35 , H10K59/351 , H10K59/352 , H10K71/00 , H10K2102/3023 , H10K2102/3026 , H10K2102/3031
Abstract: A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.
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公开(公告)号：US11837190B2
公开(公告)日：2023-12-05
申请号：US17684668
申请日：2022-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jinoh Kim
IPC: G09G3/36
CPC classification number: G09G3/3685 , G09G2320/0252 , G09G2320/0257 , G09G2320/0673 , G09G2330/02
Abstract: A display apparatus is provided. The display apparatus includes: a liquid crystal panel; a source driver configured to output a grayscale voltage to the liquid crystal panel; a power supply configured to provide a voltage to the source driver; and a controller configured to control the power supply and the source driver to change a maximum voltage provided to the source driver and a grayscale voltage based on conversion of a screen mode, and to set a predetermined grayscale region and an over driving region within an entire grayscale region.
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公开(公告)号：US11810527B2
公开(公告)日：2023-11-07
申请号：US17857045
申请日：2022-07-04
Applicant: LAPIS Technology Co., Ltd.
Inventor： Hiroshi Tsuchi
CPC classification number: G09G3/3685 , G09G3/2018 , G09G3/3614 , G09G3/3648 , G09G2310/0291 , G09G2310/0297 , G09G2310/08 , G09G2320/0209 , G09G2320/0247
Abstract: The disclosure includes multiple data drivers provided for each predetermined number of data lines. Each data driver receives an image signal; generates, based on the image signal, a positive gradation data signal and a negative gradation data signal; outputs one of the positive and negative gradation data signals to one of a first and second data line groups of a display panel; and outputs the other of the positive and negative gradation data signals to the other of the first and second data line groups. The data driver shifts a phase of the negative gradation data signal in a direction delayed with respect to the positive gradation data signal, and controls a slew rate of an output amplifier for outputting the positive gradation data signal to be lower than that of an output amplifier for outputting the negative gradation data signal.
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公开(公告)号：US20230343304A1
公开(公告)日：2023-10-26
申请号：US18334692
申请日：2023-06-14
Applicant: HYFY USA INC.
Inventor： Alex HENZEN , Todd ROCKOFF
CPC classification number: G09G3/3685 , G09G3/3674 , G09G3/2096 , G09G2310/0289 , G09G2360/08 , G09G2310/0291 , G09G2310/0294 , G09G2330/021
Abstract: A video display includes a display panel with gate drivers and source drivers. Each of said the source drivers is arranged to receive a discrete-time continuous-amplitude signal representing a video stream over a transmission medium and to decode the signal using demodulation to produce a plurality of samples for output on outputs of the source drivers. At least one of the source drivers is arranged to extract a gate driver timing control signal from the signal and to output the gate driver control signal to the gate drivers in order to synchronize the gate drivers with outputs of the source drives, whereby the video stream is displayed on the display panel of the display unit.
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