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公开(公告)号:US10819344B2
公开(公告)日:2020-10-27
申请号:US16673718
申请日:2019-11-04
发明人: Hervé Fanet , Gaël Pillonnet
IPC分类号: H03K19/09 , H03K19/0944
摘要: A logic cell, including a first capacitor connected between an application node for applying a supply voltage of the cell and a floating node for providing an output logic signal of the cell, and, connected in parallel with the first capacitor, an association in series of a second capacitor and a first variable-resistance element, the first variable-resistance element including a control electrode connected to an application node for applying a first input logic signal of the cell.
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公开(公告)号:US20200153433A1
公开(公告)日:2020-05-14
申请号:US16673677
申请日:2019-11-04
发明人: Gaël Pillonnet , Hervé Fanet
IPC分类号: H03K19/00 , H03K19/0185 , H03K19/094
摘要: An adiabatic logic cell including a first MOS transistor coupling a node for applying a periodic variable supply voltage of the cell to a floating node for providing an output logic signal of the cell, wherein the first transistor is a dual-gate transistor including a front gate coupled to a node for applying an input logic signal of the cell, and a back gate coupled to a node for applying a first periodic variable bias voltage.
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