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公开(公告)号：US20090302938A1
公开(公告)日：2009-12-10
申请号：US12542634
申请日：2009-08-17
申请人： Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L.W. Chieng , Larry E. Hand , Wilson E. Taylor
发明人： Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L.W. Chieng , Larry E. Hand , Wilson E. Taylor
CPC分类号： H03F3/217
摘要： A low delay corrector (LDC) unit includes a non-linear function generator and a filter. The nonlinear function generator receives a first signal and outputs a second signal in dependence on the first signal and a transfer function of the nonlinear function generator. The filter is fed in dependence on the second signal output by the nonlinear function generator. The first signal received by the nonlinear function generator is derived in dependence on an input signal provided to an input of the LDC unit and an output of the filter. An output of the LDC unit is derived in dependence on the first signal received by the nonlinear function generator and the second signal output by the nonlinear function generator.
摘要翻译： 低延迟校正器（LDC）单元包括非线性函数发生器和滤波器。 非线性函数发生器接收第一信号并根据第一信号和非线性函数发生器的传递函数输出第二信号。 滤波器根据由非线性函数发生器输出的第二信号进给。 根据提供给LDC单元的输入的输入信号和滤波器的输出，导出由非线性函数发生器接收到的第一信号。 根据由非线性函数发生器接收到的第一信号和由非线性函数发生器输出的第二信号，导出LDC单元的输出。
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公开(公告)号：US07970088B2
公开(公告)日：2011-06-28
申请号：US12343317
申请日：2008-12-23
IPC分类号： H04L7/00
CPC分类号： H03F3/217 , H03F2200/03 , H03H17/0275 , H03H17/0642 , H03H17/0685
摘要： Systems and methods are provided for converting input data streams having variable input sample rates to an output sample rate, which systems and methods are used in processing the data streams. In one embodiment, a system includes a clock source, a counter configured to count cycles for a corresponding data stream, and a data processor. The data processor is configured to read the number of cycles counted by the counter between received frame sync signals and to convert the first data stream to the predetermined output sample rate based on the corresponding number of cycles counted.
摘要翻译： 提供了用于将具有可变输入采样率的输入数据流转换为输出采样率的系统和方法，哪些系统和方法用于处理数据流。 在一个实施例中，系统包括时钟源，被配置为对相应数据流计数周期的计数器和数据处理器。 数据处理器被配置为读取由接收到的帧同步信号之间的计数器计数的周期数，并且基于相应的计数周期将第一数据流转换成预定的输出采样率。
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13.发明授权Systems and methods for sample rate conversion using multiple rate estimate counters 失效使用多个速率估计计数器进行采样率转换的系统和方法公开(公告)号：US07474722B1
公开(公告)日：2009-01-06
申请号：US10805591
申请日：2004-03-19
IPC分类号： H04L7/00
CPC分类号： H03F3/217 , H03F2200/03 , H03H17/0275 , H03H17/0642 , H03H17/0685
摘要： Systems and methods for using multiple rate estimate counters in converting input data streams having variable sample rates to an output sample rate that are used in processing the data streams. In one embodiment, a system includes a clock source, first and second counters coupled to the clock source and configured to count cycles for corresponding data streams, and a data processor coupled to the first and second counters. The data processor is configured to read the number of cycles counted by each of the counters between received frame sync signals and to convert the first data stream to the predetermined output sample rate based on the corresponding number of cycles counted, and to convert the second data stream to the predetermined output sample rate based on the ratio of the numbers of cycles counted in the first and second counters.
摘要翻译： 用于将具有可变采样率的输入数据流转换为用于处理数据流的输出采样率的多个速率估计计数器的系统和方法。 在一个实施例中，系统包括时钟源，耦合到时钟源的第一和第二计数器，并且被配置为对相应数据流计数周期，以及耦合到第一和第二计数器的数据处理器。 数据处理器被配置为读取由接收到的帧同步信号之间的每个计数器计数的周期数，并且基于相应的计数周期将第一数据流转换成预定的输出采样率，并且将第二数据 基于在第一和第二计数器中计数的周期数的比率，将其流送到预定的输出采样率。
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14.发明授权SRC with multiple sets of filter coefficients in memory and a high order coefficient interpolator 有权存储器中具有多组滤波器系数的SRC和高阶系数内插器公开(公告)号：US07908306B1
公开(公告)日：2011-03-15
申请号：US10805596
申请日：2004-03-19
IPC分类号： G06F17/10
CPC分类号： H03H17/0294 , H03F3/217 , H03H17/0275 , H03H17/0292 , H03H17/0433 , H03H17/0455
摘要： Systems and methods for converting a data stream from a first sample rate to a second sample rate using a sample rate converter that employs selectable filters. In one embodiment, the filters are implemented by providing multiple sets of filter coefficients in a memory, selecting one of the sets of filter coefficients and performing coefficient interpolation to produce filter coefficients that are convolved with the input data stream to produce a re-sampled output data stream. The input signal can be an audio signal that is convolved with interpolated polyphase filter coefficients in the sample rate converter of a digital PWM audio amplifier. The set of filter coefficients can be selected by a value stored in a filter selection register that is modifiable by a DSP or by user input. The sets of filter coefficients can be stored in a single memory and interpolated according to a cubic spline interpolation algorithm.
摘要翻译： 用于使用采用可选择滤波器的采样率转换器将数据流从第一采样率转换为第二采样率的系统和方法。 在一个实施例中，通过在存储器中提供多组滤波器系数来实现滤波器，选择滤波器系数集合中的一个并执行系数插值以产生与输入数据流卷积的滤波器系数，以产生再采样输出 数据流。 输入信号可以是在数字PWM音频放大器的采样率转换器中与内插多相滤波器系数进行卷积的音频信号。 滤波器系数的集合可以通过存储在滤波器选择寄存器中的值来选择，该值可由DSP或用户输入来修改。 滤波器系数组可以存储在单个存储器中，并根据三次样条插值算法进行内插。
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15.发明授权Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility 有权使用硬件和软件实现采样率转换器的系统和方法，以最大限度地提高速度和灵活性公开(公告)号：US07167112B2
公开(公告)日：2007-01-23
申请号：US10805569
申请日：2004-03-20
IPC分类号： H03M7/00
CPC分类号： H03H17/0621 , H03H2218/06
摘要： Systems and methods for converting a digital input data stream from a first sample rate to a second, fixed sample rate using a combination of hardware and software components. In one embodiment, a system includes a rate estimator configured to estimate the sample rate of an input data stream, a phase selection unit configured to select a phase for interpolation of a set of polyphase filter coefficients based on the estimated sample rate, a coefficient interpolator configured to interpolate the filter coefficients based on the selected phase, and a convolution unit configured to convolve the interpolated filter coefficients with samples of the input data stream to produce samples of a re-sampled output data stream. One or more hardware or software components are shared between multiple channels that can process data streams having independently variable sample rates.
摘要翻译： 用于使用硬件和软件组件的组合将数字输入数据流从第一采样率转换为第二固定采样率的系统和方法。 在一个实施例中，系统包括：速率估计器，被配置为估计输入数据流的采样率;相位选择单元，被配置为基于所估计的采样率来选择用于内插多相滤波器系数的相位;系数内插器 被配置为基于所选择的相位内插所述滤波器系数;以及卷积单元，其被配置为将所述内插滤波器系数与所述输入数据流的采样进行卷积，以产生重新采样的输出数据流的采样。 一个或多个硬件或软件组件在可以处理具有独立可变采样率的数据流的多个通道之间共享。
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16.发明申请公开(公告)号：US20070194845A1
公开(公告)日：2007-08-23
申请号：US11672321
申请日：2007-02-07
IPC分类号： H03F3/38
CPC分类号： H03F3/217
摘要： Systems and methods for minimizing errors due to component variation in switching amplifiers utilizing power supply feed forward techniques. One embodiment comprises a digital PWM amplifier having an amplification subsystem for receiving a digital audio signal and producing an analog output signal. The amplifier includes a power supply feed-forward path configured to modify the digital audio signal based on a power supply measurement. The feed-forward path includes an analog filter configured to filter the power supply measurement, as well as correction circuitry configured to correct component mismatch errors introduced by the filter. The power supply measurement may be a power supply difference, a power supply common mode, or both. In either case, the power supply measurement is corrected by multiplying the measurement by an appropriately scaled power supply difference.
摘要翻译： 利用电源前馈技术最小化开关放大器中元件变化的误差的系统和方法。 一个实施例包括具有用于接收数字音频信号并产生模拟输出信号的放大子系统的数字PWM放大器。 放大器包括配置为基于电源测量修改数字音频信号的电源前馈路径。 前馈路径包括被配置为滤波电源测量的模拟滤波器以及被配置为校正由滤波器引入的组件失配错误的校正电路。 电源测量可以是电源差异，电源共模或两者。 在任一情况下，通过将测量乘以适当缩放的电源差异来校正电源测量。
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17.发明授权公开(公告)号：US07436255B2
公开(公告)日：2008-10-14
申请号：US11672321
申请日：2007-02-07
IPC分类号： H03F3/38
CPC分类号： H03F3/217
摘要： Systems and methods for minimizing errors due to component variation in switching amplifiers utilizing power supply feed forward techniques. One embodiment comprises a digital PWM amplifier having an amplification subsystem for receiving a digital audio signal and producing an analog output signal. The amplifier includes a power supply feed-forward path configured to modify the digital audio signal based on a power supply measurement. The feed-forward path includes an analog filter configured to filter the power supply measurement, as well as correction circuitry configured to correct component mismatch errors introduced by the filter. The power supply measurement may be a power supply difference, a power supply common mode, or both. In either case, the power supply measurement is corrected by multiplying the measurement by an appropriately scaled power supply difference.
摘要翻译： 利用电源前馈技术最小化开关放大器中元件变化的误差的系统和方法。 一个实施例包括具有用于接收数字音频信号并产生模拟输出信号的放大子系统的数字PWM放大器。 放大器包括配置为基于电源测量修改数字音频信号的电源前馈路径。 前馈路径包括被配置为滤波电源测量的模拟滤波器以及被配置为校正由滤波器引入的组件失配错误的校正电路。 电源测量可以是电源差异，电源共模或两者。 在任一情况下，通过将测量乘以适当缩放的电源差异来校正电源测量。
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公开(公告)号：US20070183490A1
公开(公告)日：2007-08-09
申请号：US11672191
申请日：2007-02-07
IPC分类号： H03K9/08
CPC分类号： H03F3/2171 , H03F1/32 , H03F1/52 , H03F1/523 , H03F3/2175 , H03F2200/03 , H03F2200/153 , H03F2200/351
摘要： Systems and methods for improving the stability of feedback and/or feed-forward subsystems in digital amplifiers. One embodiment comprises a digital pulse width modulation (PWM) controller. The controller includes an input for receiving a digital audio input signal and is configured to generate a PWM output signal based on the input signal at an output. The controller also has control inputs for receiving external audio correction signals such as feedback and power supply feed-forward signals. The controller has correction circuitry for processing the received external control signals and modifying the input signal based on these signals. Fault detectors monitor fault conditions at various locations within the correction circuitry, and a protection control unit receives fault signals from the fault detectors and modifies operation of the controller in response to the fault signals.
摘要翻译： 用于提高数字放大器中反馈和/或前馈子系统稳定性的系统和方法。 一个实施例包括数字脉宽调制（PWM）控制器。 控制器包括用于接收数字音频输入信号的输入端，并且被配置为基于输出端的输入信号产生PWM输出信号。 控制器还具有用于接收外部音频校正信号（如反馈和电源前馈信号）的控制输入。 该控制器具有校正电路，用于处理所接收的外部控制信号，并根据这些信号修改输入信号。 故障检测器监视校正电路内的各个位置的故障状况，保护控制单元从故障检测器接收故障信号，并根据故障信号修改控制器的操作。
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公开(公告)号：US07518444B2
公开(公告)日：2009-04-14
申请号：US11672191
申请日：2007-02-07
IPC分类号： H03F3/38
CPC分类号： H03F3/2171 , H03F1/32 , H03F1/52 , H03F1/523 , H03F3/2175 , H03F2200/03 , H03F2200/153 , H03F2200/351
摘要： Systems and methods for improving the stability of feedback and/or feed-forward subsystems in digital amplifiers. One embodiment comprises a digital pulse width modulation (PWM) controller. The controller includes an input for receiving a digital audio input signal and is configured to generate a PWM output signal based on the input signal at an output. The controller also has control inputs for receiving external audio correction signals such as feedback and power supply feed-forward signals. The controller has correction circuitry for processing the received external control signals and modifying the input signal based on these signals. Fault detectors monitor fault conditions at various locations within the correction circuitry, and a protection control unit receives fault signals from the fault detectors and modifies operation of the controller in response to the fault signals.
摘要翻译： 用于提高数字放大器中反馈和/或前馈子系统稳定性的系统和方法。 一个实施例包括数字脉宽调制（PWM）控制器。 控制器包括用于接收数字音频输入信号的输入端，并且被配置为基于输出端的输入信号产生PWM输出信号。 控制器还具有用于接收外部音频校正信号（如反馈和电源前馈信号）的控制输入。 该控制器具有校正电路，用于处理所接收的外部控制信号，并根据这些信号修改输入信号。 故障检测器监视校正电路内的各个位置的故障状况，保护控制单元从故障检测器接收故障信号，并根据故障信号修改控制器的操作。
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20.发明授权Systems and methods for correcting errors resulting from component mismatch in a feedback path 有权用于校正由反馈路径中的组件不匹配引起的错误的系统和方法公开(公告)号：US07482865B2
公开(公告)日：2009-01-27
申请号：US11672331
申请日：2007-02-07
IPC分类号： H03F3/38
CPC分类号： H03F3/2173 , H03F1/30 , H03F1/34 , H03F2200/03 , H03F2200/351
摘要： Systems and methods for minimizing performance degradation due to component mismatch in the feedback path of a digital PWM amplifier feedback loop. One embodiment comprises a digital pulse width modulated (PWM) amplifier with feedback. The amplification subsystem receives a digital audio signal and produces an analog output signal. The feedback loop produces a feedback signal based on the filtered analog output signal and modifies the digital audio signal based on the feedback signal. The feedback loop includes a filter configured to filter the analog output signal and correction circuitry configured to correct component mismatch errors introduced by the filter. In one embodiment, the correction circuitry receives a measurement of a power supply voltage, multiplies the measured voltage by a gain and adds the scaled measurement to the feedback signal to correct for the component mismatch errors.
摘要翻译： 用于使数字PWM放大器反馈回路的反馈路径中的组件不匹配导致性能下降最小化的系统和方法。 一个实施例包括具有反馈的数字脉宽调制（PWM）放大器。 放大子系统接收数字音频信号并产生模拟输出信号。 反馈回路基于滤波的模拟输出信号产生反馈信号，并且基于反馈信号修改数字音频信号。 反馈回路包括被配置为过滤模拟输出信号的滤波器和被配置为校正由滤波器引入的元件失配误差的校正电路。 在一个实施例中，校正电路接收电源电压的测量，将测量的电压乘以增益，并将缩放的测量值加到反馈信号上，以校正组件失配误差。
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