公开(公告)号：US08539146B2

公开(公告)日：2013-09-17

申请号：US13305200

申请日：2011-11-28

申请人： Mark A. Brittain ,  John Steven Dodson ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Jeffrey A. Stuecheli

发明人： Mark A. Brittain ,  John Steven Dodson ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00

CPC分类号： G11C11/40615 ,  G06F13/1694 ,  Y02D10/14

摘要： A method for performing refresh operations on a rank of memory devices is disclosed. After the completion of a memory operation, a determination is made whether or not a refresh backlog count value is less than a predetermined value and the rank of memory devices is being powered down. If the refresh backlog count value is less than the predetermined value and the rank of memory devices is being powered down, an Idle Count threshold value is set to a maximum value such that a refresh operation will be performed after a maximum delay time. If the refresh backlog count value is not less than the predetermined value or the rank of memory devices is not in a powered down state, the Idle Count threshold value is set based on the slope of an Idle Delay Function such that a refresh operation will be performed accordingly.

摘要翻译： 公开了一种用于在一级存储器件上执行刷新操作的方法。 在完成存储器操作之后，确定刷新积压计数值是否小于预定值，并且存储器件的等级被断电。 如果刷新积压计数值小于预定值并且存储器件的等级被断电，则将空闲计数阈值设置为最大值，使得将在最大延迟时间之后执行刷新操作。 如果刷新积压计数值不小于预定值或存储器件的等级不处于掉电状态，则基于空闲延迟功能的斜率来设置空闲计数阈值，使得刷新操作将 相应地执行。

公开(公告)号：US20130138878A1

公开(公告)日：2013-05-30

申请号：US13305200

申请日：2011-11-28

申请人： Mark A. Brittain ,  John Steven Dodson ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Jeffrey A. Stuecheli

发明人： Mark A. Brittain ,  John Steven Dodson ,  Benjiman L. Goodman ,  Stephen J. Powell ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00

CPC分类号： G11C11/40615 ,  G06F13/1694 ,  Y02D10/14

摘要： A method for performing refresh operations on a rank of memory devices is disclosed. After the completion of a memory operation, a determination is made whether or not a refresh backlog count value is less than a predetermined value and the rank of memory devices is being powered down. If the refresh backlog count value is less than the predetermined value and the rank of memory devices is being powered down, an Idle Count threshold value is set to a maximum value such that a refresh operation will be performed after a maximum delay time. If the refresh backlog count value is not less than the predetermined value or the rank of memory devices is not in a powered down state, the Idle Count threshold value is set based on the slope of an Idle Delay Function such that a refresh operation will be performed accordingly.

摘要翻译： 公开了一种用于在一级存储器件上执行刷新操作的方法。 在完成存储器操作之后，确定刷新积压计数值是否小于预定值，并且存储器件的等级被断电。 如果刷新积压计数值小于预定值并且存储器件的等级被断电，则将空闲计数阈值设置为最大值，使得将在最大延迟时间之后执行刷新操作。 如果刷新积压计数值不小于预定值或存储器件的等级不处于掉电状态，则基于空闲延迟功能的斜率来设置空闲计数阈值，使得刷新操作将 相应地执行。

公开(公告)号：US08909874B2

公开(公告)日：2014-12-09

申请号：US13371906

申请日：2012-02-13

申请人： Mark A. Brittain ,  John S. Dodson ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Mark A. Brittain ,  John S. Dodson ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G11C11/40607 ,  G06F13/1626 ,  G06F13/1689

摘要： A memory system and data processing system for controlling memory refresh operations in dynamic random access memories. The memory controller comprises logic that: tracks a time remaining before a scheduled time for performing a high priority, high latency operation a first memory rank of the memory system; responsive to the time remaining reaching a pre-established early notification time before the schedule time for performing the high priority, high latency operation, biases the re-order queue containing memory access operations targeting the plurality of ranks to prioritize scheduling of any first memory access operations that target the first memory rank. The logic further: schedules the first memory access operations to the first memory rank for early completion relative to other memory access operations in the re-order queue that target other memory ranks; and performs the high priority, high latency operation at the first memory rank at the scheduled time.

摘要翻译： 一种用于控制动态随机存取存储器中的存储器刷新操作的存储器系统和数据处理系统。 存储器控制器包括以下逻辑：跟踪在用于执行高优先级高等待时间操作的预定时间之前的剩余时间存储器系统的第一存储器等级; 响应于在执行高优先级高等待时间操作的调度时间之前达到预先建立的早期通知时间的时间，偏置包含针对多个等级的存储器访问操作的重新排序队列，以优先排序任何第一存储器访问 针对第一个内存排名的操作。 该逻辑进一步：将第一存储器访问操作调度到第一存储器等级以便相对于针对其他存储器排序的重新排序队列中的其他存储器访问操作来提前完成; 并且在预定时间在第一存储器等级执行高优先级，高延迟操作。

公开(公告)号：US20130212330A1

公开(公告)日：2013-08-15

申请号：US13371906

申请日：2012-02-13

申请人： Mark A. Brittain ,  John S. Dodson ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

发明人： Mark A. Brittain ,  John S. Dodson ,  Stephen J. Powell ,  Eric E. Retter ,  Jeffrey A. Stuecheli

IPC分类号： G06F12/00

CPC分类号： G11C11/40607 ,  G06F13/1626 ,  G06F13/1689

摘要： A memory system and data processing system for controlling memory refresh operations in dynamic random access memories. The memory controller comprises logic that: tracks a time remaining before a scheduled time for performing a high priority, high latency operation a first memory rank of the memory system; responsive to the time remaining reaching a pre-established early notification time before the schedule time for performing the high priority, high latency operation, biases the re-order queue containing memory access operations targeting the plurality of ranks to prioritize scheduling of any first memory access operations that target the first memory rank. The logic further: schedules the first memory access operations to the first memory rank for early completion relative to other memory access operations in the re-order queue that target other memory ranks; and performs the high priority, high latency operation at the first memory rank at the scheduled time.

摘要翻译： 一种用于控制动态随机存取存储器中的存储器刷新操作的存储器系统和数据处理系统。 存储器控制器包括以下逻辑：跟踪在用于执行高优先级高等待时间操作的预定时间之前的剩余时间存储器系统的第一存储器等级; 响应于在执行高优先级高等待时间操作的调度时间之前达到预先建立的早期通知时间的时间，偏置包含针对多个等级的存储器访问操作的重新排序队列，以优先排序任何第一存储器访问 针对第一个内存排名的操作。 该逻辑进一步：将第一存储器访问操作调度到第一存储器等级以便相对于针对其他存储器排序的重新排序队列中的其他存储器访问操作来提前完成; 并且在预定时间在第一存储器等级执行高优先级，高延迟操作。

公开(公告)号：US08521982B2

公开(公告)日：2013-08-27

申请号：US12424207

申请日：2009-04-15

申请人： Robert A. Cargnoni ,  Guy L. Guthrie ,  Thomas L. Jeremiah ,  Stephen J. Powell ,  William J. Starke ,  Jeffrey A. Steucheli

发明人： Robert A. Cargnoni ,  Guy L. Guthrie ,  Thomas L. Jeremiah ,  Stephen J. Powell ,  William J. Starke ,  Jeffrey A. Steucheli

IPC分类号： G06F12/00

CPC分类号： G06F12/123 ,  G06F12/084 ,  G06F12/0897

摘要： A system and method for tracking core load requests and providing arbitration and ordering of requests. When a core interface unit (CIU) receives a load operation from the processor core, a new entry in allocated in a queue of the CIU. In response to allocating the new entry in the queue, the CIU detects contention between the load request and another memory access request. In response to detecting contention, the load request may be suspended until the contention is resolved. Received load requests may be stored in the queue and tracked using a least recently used (LRU) mechanism. The load request may then be processed when the load request resides in a least recently used entry in the load request queue. CIU may also suspend issuing an instruction unless a read claim (RC) machine is available. In another embodiment, CIU may issue stored load requests in a specific priority order.

摘要翻译： 用于跟踪核心负载请求并提供仲裁和请求排序的系统和方法。 当核心接口单元（CIU）从处理器核心接收到加载操作时，分配在CIU队列中的新条目。 响应于在队列中分配新条目，CIU检测加载请求和另一个存储器访问请求之间的争用。 响应于检测到争用，负载请求可以被暂停，直到争用被解决。 接收到的加载请求可以存储在队列中，并使用最近最少使用的（LRU）机制进行跟踪。 然后可以在加载请求驻留在加载请求队列中最近最少使用的条目中时处理加载请求。 除非读取权利要求（RC）机器可用，否则CIU也可以暂停发出指令。 在另一个实施例中，CIU可以以特定优先级顺序发布存储的加载请求。