摘要:
A row select driver circuit is used to energize each pixel row sequentially of a liquid crystal display. The output of each row select driver circuit is connected to a corresponding pixel row line and to a succeeding row select driver circuit as an activating input. All the row select driver circuits are integrated with thin-film transistors and deposited on the same glass substrate as the pixels. The number of leads connected to the assembly is much less than the number of pixel rows, including two sets of overlapping clock signals (three each for odd-numbered rows and even-numbered rows offset by one scanning line time) with different pulsewidths and periods twice as long as the scanning line time, a clock signal with a period as long as the scanning line time, a shift-in signal, a positive power supply terminal and at least one ground. These long clock periods precharge the following stage so as to effect a faster deselect time by overcoming the long time constant due to the high series of the thin-film transistors. In one example, the number of leads is reduced from 240 to 11.
摘要:
A data driver circuit and system driving scheme that can be integrated directly onto an LCD display substrate to eliminate the cost of the peripheral integrated circuits and the hybrid assembly needed by unscanned active matrix liquid crystal displays to connect them to the array. A demultiplexer circuit is deposited on the display for demultiplexing a group of Y columns of multiplexed video data input signals to X groups of Y pixel capacitors that are also deposited on the substrate in Z rows. In addition, a precharging circuit is deposited on the substrate to precharge the pixel capacitors to a first voltage level such that the video data input signals coupled thereto in a demultiplexed fashion causes the pixels to discharge to a second predetermined voltage level to provide a video display as the rows of pixels are sequentially scanned.
摘要:
A circuit for use with an LCD display wherein the LCD display contains a first number of pixel columns and a second number of pixel rows on a substrate is provided. The circuit comprises a plurality of row select driver circuits corresponding to the number of pixel rows for electrically energizing the pixel rows. The row select driver circuit is deposited on the LCD display substrate and an output of each of the row select driver circuits is electrically connected to a corresponding pixel row and to a successive row select driver circuit as an activating input. Switching apparatus external to the LCD display and having leads electrically connected to the row select driver circuits is also provided for electrically switching the row select driver circuits such that each pixel row is sequentially energized. A corresponding method is also disclosed.
摘要:
In a CMOS-type image sensor, a plurality of pairs of light-detecting elements (LDEs) are arranged in rows and columns to generate analog signals proportional to the intensity of light impinging on respective one of the LDEs. First and second photo sensing means in each pair of LDEs are coupled in parallel, in the column direction, at a floating sensing point through first turn-on means. The first and second photo sensing means in adjacent pairs of LDEs are coupled in parallel in the column direction through second turn-on means. The first turn-on means are enabled by first control lines and the second turn-on means are enabled by second control lines coupled thereto, respectively. Analog signals acquired in the first and second photo sensing means of one pair or of adjacent pairs are present at the floating sensing point in response to the enabling of the first or second control lines, respectively.
摘要:
The number of external column driver chip can be reduced to one in an active matrix liquid crystal display with column input multiplexing driving scheme. At least two sample and hold circuits are used for each column with alternate sampling and holding periods. Video signals are sampled and held at least twice during one line scanning time. These sample and hold circuits are all integrated in the driver chip.
摘要:
A level shifter circuit has a pair of voltage buses, first and second p-channel MOS transistors and third and fourth n-channel MOS transistors. Each transistor has a gate to control conduction. The first and third transistors are connected in series between the voltage buses and the second and fourth transistors are connected in series between the voltage buses. A node between the first and second transistors is connected to the gates of the second and fourth transistors. An input signal having one of first and second levels is applied to the gate of the first transistor while the inverse of the input signal is applied to the gate of the second transistor. One voltage bus is connected through one of the second and fourth transistors in response to the first level input signal. The other voltage bus is connected the other of the second and fourth transistors in response to the second level input signal.