公开(公告)号：US20230261088A1

公开(公告)日：2023-08-17

申请号：US17669584

申请日：2022-02-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Man Gu ,  Hong Yu ,  Jianwei Peng ,  Haiting Wang

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L21/285

CPC classification number: H01L29/66507 ,  H01L21/28518 ,  H01L29/42392 ,  H01L29/78696

Abstract: Structures for a transistor and methods of forming a structure for a transistor. The structure includes a first dielectric spacer, a second dielectric spacer, and a gate laterally between the first dielectric spacer and the second dielectric spacer. The gate includes a first silicide layer extending from the first dielectric spacer to the second dielectric spacer. The structure further includes a second silicide layer within the first silicide layer, and a contact that is aligned to the second silicide layer.

公开(公告)号：US20230112377A1

公开(公告)日：2023-04-13

申请号：US17496296

申请日：2021-10-07

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Kaustubh Shanbhag ,  Eric S. Kozarsky ,  George R. Mulfinger ,  Jianwei Peng

IPC: H01L27/12 ,  H01L21/84

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to semiconductor devices with a shared common backside well and methods of manufacture. The structure includes: adjacent gate structures over a semiconductor substrate; a common well in the semiconductor substrate under the adjacent gate structures; a deep trench isolation structure extending through the common well between the adjacent gate structures; and a shared diffusion region between the adjacent gate structures.