公开(公告)号：US20190095651A1

公开(公告)日：2019-03-28

申请号：US16082259

申请日：2016-07-07

Applicant: Hitachi, Ltd

Inventor： Nobuhiro YOKOI ,  Mutsumi HOSOYA ,  Ken SUGIMOTO

IPC: G06F21/79 ,  G06F21/60 ,  H04L9/08 ,  G06F3/06

Abstract: A computer system includes a processor, a volatile storage device that stores a program to be executed by the processor, and a plurality of nonvolatile storage devices that store data. Each of the plurality of nonvolatile storage devices holds a first encryption key for encrypting and decrypting first data. Each nonvolatile storage device in the plurality of nonvolatile storage devices transfers the first data to another nonvolatile storage device in the plurality of nonvolatile storage devices in an encrypted or unencrypted state determined according to a predetermined rule.

公开(公告)号：US20180189126A1

公开(公告)日：2018-07-05

申请号：US15740078

申请日：2015-07-08

Applicant: HITACHI, LTD.

Inventor： Ken SUGIMOTO ,  Yusuke FUNAYA

IPC: G06F11/07 ,  G06F1/26

Abstract: A computer system comprises a computer being coupled to a device via a device interface. The device interface has an error status register and a link status register. An error isolation unit periodically obtains values of the error status register and the link status register. The error isolation unit determine whether an error occurs in the device; determine whether the error is an error to be isolated; determine whether the error is an error to be isolated based on values of the error status register and the link status register re-obtained after elapse of a predetermined time in a case of determining the error is not to be isolated. The error isolation unit detects the error as an error of a protocol caused by stop of a power supply in a case of determining the error is to be isolated.