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公开(公告)号：US20250078746A1
公开(公告)日：2025-03-06
申请号：US18287305
申请日：2023-01-06
Inventor： Yao ZHANG , Wenchao BAO , Song MENG , Xiaolong WEI , Miao LIU , Cheng XU
IPC: G09G3/3233
Abstract: Provided is a method for sensing pixel internal data in a display device. The method includes: sensing pixel internal data for each line of pixel units to determine column sequence numbers of suspected abnormal pixel units in the line of pixel units; determining, based on a number of the suspected abnormal pixel units of each column sequence number in the at least three lines of pixel units, whether a sensing signal line corresponding to the column sequence number is an abnormal sensing signal line; and in a case that there is at least one abnormal sensing signal line, replacing pixel internal data of a column of pixel units corresponding to each abnormal sensing signal line with pixel internal data of at least one column of pixel units adjacent to the abnormal sensing signal line each time the pixel internal data of all pixel units is sensed.
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公开(公告)号：US20240395201A1
公开(公告)日：2024-11-28
申请号：US18272811
申请日：2022-07-29
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Xiuting LIU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3233 , G11C19/28 , H10K59/131
Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.
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公开(公告)号：US20240321195A1
公开(公告)日：2024-09-26
申请号：US18257385
申请日：2022-06-24
IPC: G09G3/3225 , G02F1/1345 , G09G3/32 , G09G3/36 , H10K59/126 , H10K59/131
CPC classification number: G09G3/3225 , G02F1/13452 , G09G3/32 , G09G3/3648 , H10K59/126 , H10K59/131 , G09G2300/0426 , G09G2310/0291 , G09G2320/0219 , G09G2370/14
Abstract: A display module includes a display panel, at least one bonding circuit board, a plurality of chip-on-films, and a plurality of buffer devices. The at least one bonding circuit board each include first differential lines, and a first differential line includes a P-polarity differential sub-line and an N-polarity differential sub-line. An end of a chip-on-film is connected to the first differential line, and the other end of the chip-on-film is connected to the display panel. The buffer devices are arranged on the bonding circuit board, a buffer device is connected to ends, proximate to the chip-on-film, of the P-polarity differential sub-line and the N-polarity differential sub-line, and the buffer device is configured to reduce signal reflection between the first differential line and the chip-on-film.
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公开(公告)号：US20240363050A1
公开(公告)日：2024-10-31
申请号：US18029107
申请日：2022-06-29
IPC: G09G3/20 , G09G3/3233
CPC classification number: G09G3/2092 , G09G3/3233 , G09G2300/0842 , G09G2320/0257 , G09G2320/045
Abstract: Provided are a timing controller, sensing compensation method thereof, and display panel. The timing controller includes a sensing module (501), a built-in picture generation module (502), a multi-channel data selection module (503) and a processing output module (504). The sensing module is configured to sense whether a sensing compensation instruction is received, when received, notify built-in picture generation module and multi-channel data selection module; built-in picture generation module is configured to receive a notification and generate a first video signal; multi-channel data selection module is configured to receive a notification, switch from a display mode to a built-in picture mode, select first video signal as a video source, output first video signal to processing output module; processing output module is configured to process first video signal and output processed first video signal to the display panel so that the display panel performs sensing compensation based on the first video signal.
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公开(公告)号：US20240321198A1
公开(公告)日：2024-09-26
申请号：US18034374
申请日：2022-06-29
Inventor： Min HE , Xiaolong WEI , Song MENG , Qiang FEI , Jingbo XU , Cheng XU , Miao LIU , Pengfei YIN
IPC: G09G3/3233 , G09G3/20
CPC classification number: G09G3/3233 , G09G3/2096 , G09G2300/0819 , G09G2300/0842 , G09G2320/103
Abstract: Disclosed are a display panel and a display method thereof, and a display apparatus. The display panel includes multiple pixel units, a pixel unit includes multiple sub-pixels, a sub-pixel includes a pixel drive circuit, a sense compensation circuit, and an element to be driven, and the display panel further includes a detection unit and a compensator; the pixel drive circuit is configured to drive the element to be driven in active time; the sense compensation circuit is configured to sense electrical characteristics of the element to be driven in blank time; the detection unit is configured to detect whether a currently displayed picture is a still picture, send a first notification to the compensator when the currently displayed picture is a still picture, and send a second notification to the compensator when the currently displayed picture is a non-still picture.
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Patent Agency Ranking
公开(公告)号：US20220291537A1
公开(公告)日：2022-09-15
申请号：US17512634
申请日：2021-10-27
Inventor： Zhuolong LI , Yu ZHANG , Guangyun TONG , Liang BO , Miao LIU , Xuefei QIN
IPC: G02F1/133 , G02F1/1333 , G02F1/1347
Abstract: A display device is disclosed, which includes a display screen and a dimming screen which are arranged in a stacked manner, a backlight module on a side of the dimming screen away from the display screen, and a circuit board module on a side of the backlight module away from the dimming screen. The circuit board module includes a first control circuit board on the side of the backlight module away from the dimming screen and a second control circuit board on a side of the first control circuit board away from the backlight module, the first control circuit board is electrically connected with the dimming screen through a first Chip On Film and the second control circuit board is electrically connected with the display screen through a second Chip On Film. The circuit board module further includes a first support frame and a second support frame.
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公开(公告)号：US20250166573A1
公开(公告)日：2025-05-22
申请号：US18290493
申请日：2023-02-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Chengyuan LUO , Pan XU , Ying HAN , Donghui ZHAO , Xing ZHANG , Guangshuang LV , Cheng XU , Xing YAO , Dandan ZHOU , Miao LIU
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A shift register is provided to include: a voltage regulating circuit to adjust voltages at first and second nodes; a light-emitting cascade output circuit to write a second operating voltage from a second power terminal to a light-emitting cascade signal output terminal in response to control of the voltage at the first node, and write a first operating voltage from a first power terminal to the light-emitting cascade signal output terminal in response to control of the voltage at the second node; a light-emitting driving output circuit to write a third operating voltage from a third power terminal to a light-emitting control driving signal output terminal in response to control of the voltage at the first node, and write a fifth operating voltage from a fifth power terminal to the light-emitting control driving signal output terminal in response to control of the voltage at the second node; and a first anti-leakage circuit to write a fourth operating voltage from a fourth power terminal to a first anti-leakage node in response to control of the voltage at the second node.
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公开(公告)号：US20250095536A1
公开(公告)日：2025-03-20
申请号：US18290015
申请日：2022-11-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Donghui ZHAO , Pan XU , Ying HAN , Xing ZHANG , Chengyuan LUO , Guangshuang LV , Xing YAO , Dandan ZHOU , Miao LIU
IPC: G09G3/20
Abstract: Provided is a pixel drive circuit. The pixel drive circuit includes a plurality of scan drive circuits transmitting gate drive signals to pixels, a plurality of emission drive circuits transmitting emission control signals to the pixels, a plurality of compensation drive circuits transmitting compensation signals to the pixels, and a plurality of reset drive circuits transmitting reset signals to the pixels, which are all cascaded in a pixel column direction. In addition, the scan drive circuit, the emission drive circuit, the compensation drive circuit, and the reset drive circuit corresponding to the same row of pixels are arranged sequentially along a pixel row direction, the scan drive circuit being disposed farthest away from the pixels. Moreover, among signal lines coupled to the pixel drive circuit, a plurality of signal lines is overlapped with each other, and cutouts are provided at the overlapping portions of the plurality of signal lines.
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公开(公告)号：US20250029558A1
公开(公告)日：2025-01-23
申请号：US18281110
申请日：2022-11-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing ZHANG , Pan XU , Donghui ZHAO , Ying HAN , Chengyuan LUO , Guangshuang LV , Cheng XU , Miao LIU , Dandan ZHOU
IPC: G09G3/3233
Abstract: A driving circuit, a driving method and a display device are provided. The driving circuit includes a first control node control circuit, a second control node control circuit, a first node control circuit and a second node control circuit, wherein, the first control node control circuit is configured to control a potential of the first control node; the second control node control circuit is configured to control a potential of the second control node; the first node control circuit is configured to control a potential of the first node; the second node control circuit is electrically connected to the second control node, a first clock signal terminal and a second node respectively, and is configured to control to connect the first clock signal terminal and the second node under the control of the potential of the second control node.
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公开(公告)号：US20240272348A1
公开(公告)日：2024-08-15
申请号：US18017987
申请日：2022-04-20
Inventor： Shixin GENG , Yu ZHANG , Bochang WANG , Huiyan LI , Zhuolong LI , Miao LIU , Xuefei QIN , Lulu WANG
CPC classification number: G02B6/0073 , G02B6/0083 , G09G3/32
Abstract: The present disclosure provides a display module and a display apparatus. The display module includes a display panel, a backlight assembly, an intermediate frame and a backplane; the backplane includes a backplane body on a side of the backlight assembly away from the display panel; the backplane body includes a contact structure recessed in a direction from a side away from the light guide assembly toward a side close to the light guide assembly. The contact structure is in contact with the light guide assembly; a receiving space is between the backplane body and the light guide assembly and on a side of the contact structure close to a lateral backlight source; an elastic contact member is in a receiving space and is in contact with the backplane body and is adjacent to the light guide assembly; the intermediate frame includes an intermediate frame body surrounding the backlight assembly.
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