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公开(公告)号:US20240321195A1
公开(公告)日:2024-09-26
申请号:US18257385
申请日:2022-06-24
IPC分类号: G09G3/3225 , G02F1/1345 , G09G3/32 , G09G3/36 , H10K59/126 , H10K59/131
CPC分类号: G09G3/3225 , G02F1/13452 , G09G3/32 , G09G3/3648 , H10K59/126 , H10K59/131 , G09G2300/0426 , G09G2310/0291 , G09G2320/0219 , G09G2370/14
摘要: A display module includes a display panel, at least one bonding circuit board, a plurality of chip-on-films, and a plurality of buffer devices. The at least one bonding circuit board each include first differential lines, and a first differential line includes a P-polarity differential sub-line and an N-polarity differential sub-line. An end of a chip-on-film is connected to the first differential line, and the other end of the chip-on-film is connected to the display panel. The buffer devices are arranged on the bonding circuit board, a buffer device is connected to ends, proximate to the chip-on-film, of the P-polarity differential sub-line and the N-polarity differential sub-line, and the buffer device is configured to reduce signal reflection between the first differential line and the chip-on-film.
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公开(公告)号:US20180308440A1
公开(公告)日:2018-10-25
申请号:US15500111
申请日:2017-01-18
发明人: Xiaoyu HUANG
IPC分类号: G09G3/36
CPC分类号: G09G3/3648 , G09G2310/08 , G09G2330/06 , G09G2370/08 , G09G2370/14
摘要: Disclosed are a driving method and a driving device for reducing electromagnetic interference. A method for driving a source-chip on film S-COF and a timing controller TCON is provided as: the timing controller TCON first outputs initial data A stored in the source-chip on film S-COF; it is determined whether data received is correct by comparing transmission data received by the source-chip on film S-COF with initial data A built in the source-chip on film S-COF, and if a determination result is no, a swing value of transmission data mini-LVDS is adjusted by the timing controller TCON.
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公开(公告)号:US20180174546A1
公开(公告)日:2018-06-21
申请号:US15300950
申请日:2016-07-11
发明人: Yuntao LI
IPC分类号: G09G3/36
CPC分类号: G09G3/3696 , G09G2310/08 , G09G2330/021 , G09G2370/14
摘要: The invention provides a display panel and a power control system of a drive circuit of the display panel. The power control system includes a timer controller, a power manager, and a drive circuit. The timer controller is used for receiving a first video signal and sending a finishing signal to the power manager after reading a decoding code for decoding the first video signal successfully. The power manager is used for sending a first drive voltage and a second drive voltage to the drive circuit after receiving the finishing signal. The power control system reduces the time difference between the video signal and the voltage, thereby avoiding the black screen problem.
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公开(公告)号:US09934712B2
公开(公告)日:2018-04-03
申请号:US12066553
申请日:2005-11-10
申请人: Yong-Jae Lee
发明人: Yong-Jae Lee
CPC分类号: G09G3/20 , G09G3/3611 , G09G2300/0426 , G09G2310/027 , G09G2310/08 , G09G2330/06 , G09G2370/08 , G09G2370/14
摘要: The present invention relates to a display, a timing controller and a column driver IC, and more particularly to a display, timing controller and column driver integrated circuit using clock embedded multi-level signaling. The present invention provides a timing controller including a transmitter for transmitting a transmission signal wherein a transmission clock signal is embedded therein between a transmission data signal to have a signal magnitude different from that of the transmission data signal. The present invention also provides a column driver integrated circuit including a receiving unit for separating a clock signal from a received signal using a magnitude of the received signal, and for performing a sampling of a received data signal from the received signal using the separated clock signal.
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公开(公告)号:US20180070042A1
公开(公告)日:2018-03-08
申请号:US15695364
申请日:2017-09-05
发明人: Tae-hoon KIM , Je-hwan Seo , Seung-il Yoon
CPC分类号: H04N5/4401 , G09G5/006 , G09G5/008 , G09G2370/08 , G09G2370/14 , G09G2370/22 , H04N5/20 , H04N5/63
摘要: A communication interface device is disclosed. The communication interface device includes a plurality of terminals configured to receive a differential signal from an external device, a filter configured to include a low pass filter connected to at least one of the plurality of terminals, and a controller configured to determine whether a differential signal is input from the external device based on a change of an output value of the low pass filter.
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公开(公告)号:US20170287415A1
公开(公告)日:2017-10-05
申请号:US14907553
申请日:2015-12-28
发明人: Jingjing WU , Zhi XIONG
CPC分类号: G09G3/3696 , G06F13/1694 , G09G3/2092 , G09G3/36 , G09G2310/0243 , G09G2310/08 , G09G2370/08 , G09G2370/14 , H04J3/26 , H04Q9/14 , H04Q11/0428 , H04Q2213/13213
摘要: The present disclosure provides method for controlling a message signal within a timing controller integrated circuit, the timing controller integrated circuit and a display panel. The method includes: receiving a low voltage differential signaling signal; decoding the low voltage differential signaling signal to obtain a transistor-transistor logic RGB data signal and a control signal, wherein the control signal comprises: a start signal, a horizontal synchronization and a vertical synchronization; processing the transistor-transistor logic RGB data signal to obtain an input RGB data; controlling a timing of the start signal before a timing of the input RGB data; and processing the input RGB data to obtain a mini-low voltage differential signaling data. Therefore, the technical scheme provided by the present disclosure has an advantage of the low cost.
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公开(公告)号:US09762814B2
公开(公告)日:2017-09-12
申请号:US15111381
申请日:2014-07-28
发明人: Weilin Lei , Changjun Lu , Longhu Zhang , Zheng Sun
CPC分类号: H04N5/265 , G09G3/3208 , G09G5/005 , G09G5/008 , G09G2340/0407 , G09G2340/0435 , G09G2360/121 , G09G2360/122 , G09G2360/123 , G09G2360/126 , G09G2360/127 , G09G2360/128 , G09G2370/12 , G09G2370/14 , H04N5/04 , H04N5/9205 , H04N7/01 , H04N7/015
摘要: A data processing method and device for a Light emitting diode (LED) Television (TV), and an LED TV are disclosed, the data processing device includes: a signal processing chip configured to perform mode conversion on a received TV signal so as to obtain a first video signal of a preset mode; and a video processing chip connected to the signal processing chip and configured to perform clock synchronization processing on the first video signal so as to obtain a second video signal and output the second video signal to an LED display. The problem in the prior art that an LED TV can only display a TV signal of a single mode is solved, thereby achieving the effect that the LED TV can display videos of various modes and various formats.
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公开(公告)号:US20170221446A1
公开(公告)日:2017-08-03
申请号:US15423751
申请日:2017-02-03
申请人: OPTICIS CO., LTD.
发明人: Dong Pyeong YANG , Jae Chul KO , Doo Soo HA , Won Gil BYUN
CPC分类号: G09G5/005 , G06F3/147 , G09G3/2096 , G09G5/006 , G09G5/008 , G09G5/363 , G09G2370/025 , G09G2370/042 , G09G2370/047 , G09G2370/12 , G09G2370/14 , G09G2370/22 , G09G2380/08 , H04N11/20
摘要: Provided is a medical imaging system including medical equipment, a wall-plate converter, and a mobile near-source converter (NSC). The wall-plate converter supplies direct current (DC) power to the mobile NSC via a connection cable interposed between the mobile NSC and the wall-plate converter.
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公开(公告)号:US09715857B2
公开(公告)日:2017-07-25
申请号:US14905413
申请日:2015-08-17
发明人: Jianfu Liu
CPC分类号: G09G3/3607 , G09G3/2003 , G09G3/3696 , G09G5/006 , G09G2320/0666 , G09G2370/00 , G09G2370/08 , G09G2370/10 , G09G2370/14
摘要: The present invention discloses a signal conversion device, a signal conversion method, a signal generating system and a display apparatus. The signal conversion device comprises: a pixel signal transmitting chip transmitting a plurality of pixel signals arranged in a first arrangement order; a patch unit rearranging the plurality of pixel signals in second arrangement order; a signal conversion chip converting the plurality of pixel signals arranged in the first or second arrangement order into a display signal packet in a first or second predetermined format; and a signal generating and outputting unit converting the display signal packet in the second predetermined format into display signal packet in a third predetermined format.
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公开(公告)号:US09691120B2
公开(公告)日:2017-06-27
申请号:US14424664
申请日:2013-08-28
发明人: Masahiro Imai
CPC分类号: G06T1/20 , G09G3/2096 , G09G3/36 , G09G3/3685 , G09G5/18 , G09G2370/08 , G09G2370/14 , H04L25/0272
摘要: The interface circuit is provided with: a differential output circuit in which the output of a potential level of a differential signal stabilizes after a prescribed period from a start signal; and a counter circuit that performs control in such a manner that a data processing operation of a data processing unit is not performed on a signal based on the differential signal during the prescribed period. Thus, a liquid crystal display device that is capable of preventing a distorted video from being displayed in an initial drive period can be achieved.
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