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公开(公告)号：US11508299B2
公开(公告)日：2022-11-22
申请号：US16622266
申请日：2019-08-06
发明人： Shiqiang Huang , Wei Hu , Huiche Lin , Jie Yang
IPC分类号： G09G3/3233
摘要： The present disclosure provides a pixel driving circuit, a driving method thereof, and a display device. In one example, the pixel driving circuit includes: a driving transistor; a voltage holding sub-circuit, the first end of the voltage holding sub-circuit connected to the gate of the driving transistor; a data writing sub-circuit configured to supply a data voltage to the driving transistor when the first scanning line is at a first level, and connect the gate of the driving transistor and a second electrode; a converting sub-circuit configured to supply illumination power voltage to a second end of the voltage holding sub-circuit when the second scanning line is at the first level, and connect the second end of the voltage holding sub-circuit to the second end of the driving transistor when the third scanning line is at the first level; and a switch sub-circuit configured to supply illumination power voltage to the first end of the driving transistor when the third scanning line is at the first level, and connect the second end of the drive transistor to the current output end of the pixel drive circuit. The present disclosure can achieve threshold voltage compensation for the drive transistor.
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公开(公告)号：US10319747B2
公开(公告)日：2019-06-11
申请号：US15508102
申请日：2016-07-01
发明人： Chuanbao Chen , Jie Yang , Xiaobin Yin
IPC分类号： H01L27/12 , G02F1/1343 , G02F1/1362 , G02F1/1337 , H01L29/417 , H01L29/423 , G02F1/1368
摘要： An array substrate includes: a plurality of pixels including sub-pixels forming a matrix, each sub-pixel including a pair of sub-pixel portions; a plurality of data lines; a plurality of gate lines intersecting with the plurality of data lines; and a plurality of pairs of transistors configured to control the plurality of pairs of sub-pixel portions; wherein: each pair of transistors are disposed adjacent to an intersection between a gate line and a data line, across at least one of the gate line or the data line, and are configured to control a pair of sub-pixel portions in neighboring rows or columns of sub-pixel portions.
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公开(公告)号：US09985054B2
公开(公告)日：2018-05-29
申请号：US15102275
申请日：2015-09-21
发明人： Chuanbao Chen , Juncai Ma , Jie Yang
IPC分类号： G02F1/136 , H01L27/12 , G02F1/1362 , G02F1/1335 , G02F1/1345 , G02F1/1368 , G02F1/1333
CPC分类号： H01L27/1255 , G02F1/133345 , G02F1/133514 , G02F1/13454 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G02F2001/133397 , G02F2001/13606 , G02F2001/13629 , G02F2001/136295 , H01L27/02
摘要： The present disclosure provides an array substrate and a display device that can suppress the adverse effects in display due to difference in gray-scale luminance of adjacent two rows caused by variation in capacitance of adjacent two rows of TFTs as the result of displacement of the data lines. Scan lines and data lines crossing each other are arranged on the array substrate. Each row of the scan lines is provided with a gate driver circuit, wherein each row of the scan lines is further provided with a compensation capacitor connected to the gate driver circuit, the compensation capacitor including a first metal layer and a second metal layer that are overlapped with each other to form an overlap region at which the first metal layer is isolated from the second metal layer by an insulation layer, wherein the compensation capacitor in an Nth row has a capacitance that changes in a direction opposite to the direction in which the capacitance of the compensation capacitor in an N+1th row changes, and the compensation capacitor in the Nth row has a capacitance that changes in the same direction as the direction in which the capacitance of a thin film transistor capacitor in the N+1th row changes, where N is a natural number greater than or equal to 1.
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