Memory integrity monitoring
    11.
    发明授权

    公开(公告)号:US10248814B2

    公开(公告)日:2019-04-02

    申请号:US15415450

    申请日:2017-01-25

    Abstract: In one example in accordance with the present disclosure, a system comprises a first memory module and a first memory integrity monitoring processor, embedded to the first memory module, to receive a second hash corresponding to a second memory module. The second hash includes a second sequence number for reconstruction of a final hash value and the second hash is not sequentially a first number in a sequence for reconstruction of the final hash value. The first processor may receive a third hash corresponding to a third memory module. The third hash includes a third sequence number for reconstruction of the final hash value and the third hash is received after the second hash. The first processor may determine if the second hash can be combined with the third hash, combine the second hash and third hash into a partial hash reconstruct the final hash value using the partial hash.

    INPUT/OUTPUT DATA ENCRYPTION
    12.
    发明申请

    公开(公告)号:US20180365451A1

    公开(公告)日:2018-12-20

    申请号:US15420736

    申请日:2017-01-31

    Abstract: Examples relate to Input/Output (I/O) data encryption and decryption. In an example, an encryption/decryption engine on an Integrated Circuit (IC) of a computing device obtains at least one plaintext data. Some examples determine, by the encryption/decryption engine, whether the at least one plaintext data is to be sent to a memory in the computing device or to an I/O device. Some examples apply, when the at least one plaintext data is to be sent to the I/O device and by the encryption/decryption engine, an encryption primitive of a block cipher encryption algorithm to the at least one plaintext data to create output encrypted data, wherein an initialization vector that comprises a random number is applied to the encryption primitive.

    MIGRATION OF COMPUTER SYSTEMS
    14.
    发明申请

    公开(公告)号:US20180107509A1

    公开(公告)日:2018-04-19

    申请号:US15573542

    申请日:2015-07-31

    CPC classification number: G06F9/4856 G06F9/4406

    Abstract: An example method for migrating a live operating system from a first computing device to a second computing device is provided. The example method comprises (a) providing register values of a processor of a first computing device to a second computing device which is in communication with the first computing device; (b) providing contents of a dynamic random access memory, DRAM, of the first computing device to the second computing device; (c) storing the register values in a protected memory of the second computing device, wherein the protected memory is separate from a memory used by the second computing device during normal operation of the second computing device; (d) storing the contents of the DRAM of the first computing device in a DRAM of the second computing device; and (e) loading the register values from the protected memory to registers of a processor of the second computing device.

    INTEGRITY VALUES FOR BEGINNING BOOTING INSTRUCTIONS

    公开(公告)号:US20180025159A1

    公开(公告)日:2018-01-25

    申请号:US15217583

    申请日:2016-07-22

    CPC classification number: G06F21/575 G06F2221/033 H04L9/3226

    Abstract: Examples described herein include a computing device with a processing resource to execute beginning booting instructions of the computing device. The beginning booting instructions may include a first booting instruction. The computing device also includes an access line to access the first booting instruction, a measuring engine to duplicate the first booting instruction and to generate a first integrity value associated with the first booting instruction, and a measurement register to store the first integrity value. The measuring engine may be operationally screened from the processing resource and the measurement register may be inaccessible to the processing resource.

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