公开(公告)号：US07012849B2

公开(公告)日：2006-03-14

申请号：US10619594

申请日：2003-07-16

申请人： Tomohiko Otose

发明人： Tomohiko Otose

IPC分类号： G11C11/00

CPC分类号： B41J2/04541 ,  B41J2/04581 ,  G06K15/102

摘要： The invention provides a semiconductor device of low power consumption and low cost.A semiconductor device 50 is basically constituted of a semiconductor substrate 1 and an external signal processing substrate 8. The semiconductor substrate 1 is provided with a memory unit 3, a data driver 4, an element array 2, a scanning circuit 35 and a clock generator 36. When successively outputting an identical data signal to the element array 2 over a plurality of times, the data signal retained in the memory unit 3 is utilized.

摘要翻译： 本发明提供一种低功耗，低成本的半导体器件。 半导体器件50基本上由半导体衬底1和外部信号处理衬底8构成。 半导体基板1设置有存储单元3，数据驱动器4，元件阵列2，扫描电路35和时钟发生器36。 当连续地向元件阵列2输出相同的数据信号多次时，利用保存在存储单元3中的数据信号。

公开(公告)号：US07612856B2

公开(公告)日：2009-11-03

申请号：US11390863

申请日：2006-03-28

申请人： Tomohiko Otose ,  Koji Shigemura

发明人： Tomohiko Otose ,  Koji Shigemura

IPC分类号： G02F1/1339 ,  G02F1/1345

CPC分类号： G02F1/13454 ,  G02F1/1339 ,  G02F2001/13606

摘要： A display device includes: a pair of substrates disposed opposite each other; a conductive seal for sealing the gap of the outer peripheral part between the pair of substrates; an electric optical element disposed in an area defined by the substrates and the seal; a display area, formed on one substrate, having a plurality of pixels for controlling the electric optical element; and a driver circuit for controlling the pixels. The driver circuit is so configured that a circuit element affected by stray capacitance formed between the conductive seal and the driver circuit is disposed apart from the conductive seal.

摘要翻译： 显示装置包括：彼此相对布置的一对基板; 用于密封所述一对基板之间的外周部分的间隙的导电密封件; 设置在由所述基板和所述密封件限定的区域中的电光学元件; 显示区域，形成在一个基板上，具有用于控制电光学元件的多个像素; 以及用于控制像素的驱动电路。 驱动器电路被配置成使得在导电密封件和驱动器电路之间形成的受杂散电容影响的电路元件与导电密封件分开设置。

公开(公告)号：US20060215102A1

公开(公告)日：2006-09-28

申请号：US11390863

申请日：2006-03-28

申请人： Tomohiko Otose ,  Koji Shigemura

发明人： Tomohiko Otose ,  Koji Shigemura

IPC分类号： G02F1/1345 ,  G02F1/1339

CPC分类号： G02F1/13454 ,  G02F1/1339 ,  G02F2001/13606

摘要： A display device includes: a pair of substrates disposed opposite each other; a conductive seal for sealing the gap of the outer peripheral part between the pair of substrates; an electric optical element disposed in an area defined by the substrates and the seal; a display area, formed on one substrate, having a plurality of pixels for controlling the electric optical element; and a driver circuit for controlling the pixels. The driver circuit is so configured that a circuit element affected by stray capacitance formed between the conductive seal and the driver circuit is disposed apart from the conductive seal.

公开(公告)号：US08179357B2

公开(公告)日：2012-05-15

申请号：US11987057

申请日：2007-11-27

申请人： Tomohiko Otose

发明人： Tomohiko Otose

IPC分类号： G09G3/36 ,  G11C19/00

CPC分类号： G11C19/28

摘要： In a semiconductor circuit a floating node is set to any voltage by utilizing a control signal applied to a refresh terminal and has a period shorter than that of a clock signal. The circuit includes first and second transistors connected between a first clock terminal and first power supply terminal, third and fourth transistors connected between the refresh terminal and the first power supply terminal, and fifth and sixth transistors connected between a second power supply terminal and the first power supply. Gates of the fourth and fifth transistors are connected to an input terminal, a gate of the third transistor is connected to a second clock terminal, a gate of the first transistor is connected to a node between the fifth and sixth transistors, gates of the second and sixth transistors are connected, and a node between the first and second transistors is connected to an output terminal.

摘要翻译： 在半导体电路中，通过利用施加到刷新端子的控制信号将浮动节点设置为任何电压，并且具有比时钟信号的周期短的周期。 电路包括连接在第一时钟端子和第一电源端子之间的第一和第二晶体管，连接在刷新端子和第一电源端子之间的第三和第四晶体管，以及连接在第二电源端子与第一电源端子之间的第五和第六晶体管 电源。 第四晶体管和第五晶体管的栅极连接到输入端子，第三晶体管的栅极连接到第二时钟端子，第一晶体管的栅极连接到第五和第六晶体管之间的节点，第二晶体管的栅极 并且第六晶体管连接，并且第一和第二晶体管之间的节点连接到输出端子。

公开(公告)号：US07665816B2

公开(公告)日：2010-02-23

申请号：US11330968

申请日：2006-01-13

申请人： Tomohiko Otose

发明人： Tomohiko Otose

IPC分类号： B41J29/38

CPC分类号： B41J2/04541 ,  B41J2/04581 ,  G06K15/102

摘要： The invention provides a semiconductor device of low power consumption and low cost. A semiconductor device 50 is basically constituted of a semiconductor substrate 1 and an external signal processing substrate 8. The semiconductor substrate 1 is provided with a memory unit 3, a data driver 4, an element array 2, a scanning circuit 35 and a clock generator 36. When successively outputting an identical data signal to the element array 2 over a plurality of times, the data signal retained in the memory unit 3 is utilized.

摘要翻译： 本发明提供一种低功耗，低成本的半导体器件。 半导体器件50基本上由半导体衬底1和外部信号处理衬底8构成。半导体衬底1设置有存储单元3，数据驱动器4，元件阵列2，扫描电路35和时钟发生器 当多次连续地向元件阵列2输出相同的数据信号时，利用保存在存储单元3中的数据信号。

公开(公告)号：US20090290677A1

公开(公告)日：2009-11-26

申请号：US12470788

申请日：2009-05-22

申请人： Tomohiko Otose ,  Masamichi Shimoda

发明人： Tomohiko Otose ,  Masamichi Shimoda

IPC分类号： G11C19/00 ,  H02M3/07

CPC分类号： G11C19/28 ,  G09G3/3266 ,  G09G2310/0286 ,  G09G2330/021

摘要： Disclosed is a shift register which includes first transistor connected between a first clock signal terminal and an output terminal, a second transistor with a gate connected to an input terminal and a source connected to a gate of the first transistor, a third transistor with a gate connected to a second clock signal terminal, an inverter with an input connected to the input terminal, a fourth transistor cascode connected to the third transistor with a gate connected to an output of the inverter, a fifth transistor connected between the gate of the first transistor and a power supply terminal, a sixth transistor connected between the fourth transistor and the power supply terminal with a gate connected to the input terminal, and a seventh transistor connected between the output terminal and the power supply terminal, the fifth and seventh transistors having gates connected in common to a connection node of the fourth and the sixth transistors.

摘要翻译： 公开了一种移位寄存器，其包括连接在第一时钟信号端和输出端之间的第一晶体管，具有连接到输入端的栅极的第二晶体管和连接到第一晶体管的栅极的源极，具有栅极的第三晶体管 连接到第二时钟信号端子，具有连接到输入端子的输入的反相器，连接到第三晶体管的第四晶体管共源共栅，栅极连接到反相器的输出，第五晶体管连接在第一晶体管的栅极之间 电源端子，连接在第四晶体管和电源端子之间的第六晶体管，栅极连接到输入端子，第七晶体管连接在输出端子和电源端子之间，第五和第七晶体管具有栅极 共同连接到第四和第六晶体管的连接节点。

公开(公告)号：US07355323B2

公开(公告)日：2008-04-08

申请号：US11187964

申请日：2005-07-25

申请人： Tomohiko Otose

发明人： Tomohiko Otose

IPC分类号： H01L41/09

CPC分类号： H01L27/20 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1626 ,  B41J2/1631 ,  B41J2002/14459 ,  B41J2002/14491 ,  H01L41/0973

摘要： A piezoelectric device includes a flexible substrate and a piezoelectric element including a pair of electrodes each positioned on the flexible substrate. A switching element is connected to one of the pair of electrodes, in the flexible substrate, and a common line is connected to the other of the pair of electrodes, on the flexible substrate.

摘要翻译： 压电装置包括柔性基板和包括一对电极的压电元件，每对电极位于柔性基板上。 开关元件连接到柔性基板中的一对电极中的一个，并且公共线与柔性基板上的一对电极中的另一个连接。

公开(公告)号：US20060119634A1

公开(公告)日：2006-06-08

申请号：US11330968

申请日：2006-01-13

申请人： Tomohiko Otose

发明人： Tomohiko Otose

IPC分类号： B41J29/393

CPC分类号： B41J2/04541 ,  B41J2/04581 ,  G06K15/102

摘要： The invention provides a semiconductor device of low power consumption and low cost. A semiconductor device 50 is basically constituted of a semiconductor substrate 1 and an external signal processing substrate 8. The semiconductor substrate 1 is provided with a memory unit 3, a data driver 4, an element array 2, a scanning circuit 35 and a clock generator 36. When successively outputting an identical data signal to the element array 2 over a plurality of times, the data signal retained in the memory unit 3 is utilized.

摘要翻译： 本发明提供一种低功耗，低成本的半导体器件。 半导体器件50基本上由半导体衬底1和外部信号处理衬底8构成。 半导体基板1设置有存储单元3，数据驱动器4，元件阵列2，扫描电路35和时钟发生器36。 当连续地向元件阵列2输出相同的数据信号多次时，利用保存在存储单元3中的数据信号。

公开(公告)号：US20060017351A1

公开(公告)日：2006-01-26

申请号：US11187964

申请日：2005-07-25

申请人： Tomohiko Otose

发明人： Tomohiko Otose

IPC分类号： H01L41/113

CPC分类号： H01L27/20 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1626 ,  B41J2/1631 ,  B41J2002/14459 ,  B41J2002/14491 ,  H01L41/0973

摘要： A piezoelectric device includes a flexible substrate and a piezoelectric element including a pair of electrodes each positioned on the flexible substrate. A switching element is connected to one of the pair of electrodes, in the flexible substrate, and a common line is connected to the other of the pair of electrodes, on the flexible substrate.

摘要翻译： 压电装置包括柔性基板和包括一对电极的压电元件，每对电极位于柔性基板上。 开关元件连接到柔性基板中的一对电极中的一个，并且公共线与柔性基板上的一对电极中的另一个连接。