公开(公告)号：US20160078926A1

公开(公告)日：2016-03-17

申请号：US14948196

申请日：2015-11-20

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  Gunjan H. Pandya ,  Uddalak Bhattacharya ,  Zheng Guo

IPC: G11C11/419

CPC classification number: G11C11/419 ,  G11C8/16 ,  G11C11/412

Abstract: In one embodiment, a memory cell circuit for storing data includes a pair of cross-coupled inverters for storing states of the memory cell circuit. Access devices provide access to the pair of cross-coupled inverters. The memory cell circuit also includes a set of electrically inactive p-type metal oxide semiconductor (PMOS) devices that are coupled to the pair of cross-coupled inverters. The set of electrically inactive PMOS devices in combination with a portion (e.g., PMOS devices) of the pair of cross-coupled inverters enables a continuous p-type diffusion layer for the memory cell circuit.

Abstract translation: 在一个实施例中，用于存储数据的存储单元电路包括一对交叉耦合的反相器，用于存储存储单元电路的状态。 接入设备提供对一对交叉耦合逆变器的访问。 存储单元电路还包括耦合到该对交叉耦合的反相器的一组电活性p型金属氧化物半导体（PMOS）器件。 与一对交叉耦合的反相器的一部分（例如，PMOS器件）组合的一组非活性PMOS器件使得能够存储单元电路的连续p型扩散层。