公开(公告)号：US12299143B2

公开(公告)日：2025-05-13

申请号：US18496315

申请日：2023-10-27

Applicant: Intel Corporation

Inventor： Reuven Elbaum ,  Gyora Benedek ,  Avinash L. Varna ,  David Novick

IPC: G06F21/00 ,  G06F21/60 ,  H04L9/32

Abstract: An apparatus is described including cryptography circuitry to generate authentication tags to provide integrity protection for plaintext and ciphertext.

公开(公告)号：US20240110975A1

公开(公告)日：2024-04-04

申请号：US17958071

申请日：2022-09-30

Applicant: Intel Corporation

Inventor： Tsvika Kurts ,  Vladislav Mladentsev ,  Elias Khoury ,  Rakesh Kandula ,  Reuven Elbaum ,  Boris Dolgunov

IPC: G01R31/317 ,  H04L9/08 ,  H04L9/32 ,  H04L9/40

CPC classification number: G01R31/31719 ,  H04L9/0819 ,  H04L9/0866 ,  H04L9/0869 ,  H04L9/3213 ,  H04L63/0428

Abstract: Methods and apparatus relating to techniques to provide secure remote debugging are described. In an embodiment, a debugging entity generates and transmits a host token to a device via an interface. The interface provides encrypted communication between the debugging entity and the device. The debugging entity generates a session key based at least in part on the host token and a device token. The debugging entity transmits an acknowledgement signal to the device after generation of the session key to initiate a debug session. The debugging entity transmits a debug unlock key to the device to cause the device to be unlocked for the debug session. Other embodiments are also disclosed and claimed.

公开(公告)号：US11194933B2

公开(公告)日：2021-12-07

申请号：US16431153

申请日：2019-06-04

Applicant: Intel Corporation

Inventor： Yaacov Belenky ,  Gyora Benedek ,  Reuven Elbaum ,  David Novick ,  Elad Peer ,  Chaim Shen-Orr ,  Yonatan Shlomovich

IPC: H04L29/06 ,  G06F21/72 ,  H04L9/08 ,  G06F21/60 ,  G06F21/56 ,  H04L9/06 ,  H04L9/00

Abstract: The present disclosure is directed to systems and methods to protect against SCA and fault injection attacks through the use of a temporary or ephemeral key to cryptographically alter input data portions. Universal resistant block (URB) circuitry receives a seed data value and a at least one secret key data value and generates an ephemeral key output data value. Cryptographic circuitry uses the ephemeral key data value to transform an input data portion to produce an transformed output data portion. The use of an SCA or fault injection attack on the transformed output data portion will reveal only the ephemeral key data value and not the at least one secret key data value. Further, where a unique ephemeral key data value is used to transform each input data portion, an attacker cannot discover the ephemeral key in a piecemeal manner and must instead discover the complete ephemeral key data value—significantly increasing the difficulty of performing a successful SCA or fault injection attack.

公开(公告)号：US20210020775A1

公开(公告)日：2021-01-21

申请号：US17033444

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Uri Bear ,  Elad Peer ,  Elena Sidorov ,  Rami Sudai ,  Reuven Elbaum ,  Steve J. Brown

IPC: H01L29/788 ,  H01L29/423 ,  H01L29/66 ,  G11C16/04

Abstract: In one embodiment, memory cell includes a control gate, a floating gate, a substrate comprising a source region and a drain region, a first isolator between the control gate and floating gate, and a second isolator between the floating gate and the substrate. The memory cell is configured to have a retention time that is within a statistical window around a selected lifespan. The selected lifespan may be less than ten years, such as, for example, less than one year, less than one month, or less than one week.