公开(公告)号：US20090138838A1

公开(公告)日：2009-05-28

申请号：US12193431

申请日：2008-08-18

申请人： Izumi Nitta ,  Katsumi Homma ,  Toshiyuki Shibuya

发明人： Izumi Nitta ,  Katsumi Homma ,  Toshiyuki Shibuya

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A delay distribution of a partial path that passes through a node to which a plurality of signals is input and for which an estimation in a statistical MAX is predicted to be large, that is present on a critical path having large influence on a circuit delay, and that has high possibility of improving the circuit delay, among nodes in a circuit graph is calculated by the Monte Carlo simulation instead of the block based simulation, thereby increasing speed and accuracy of delay analysis.

摘要翻译： 通过输入多个信号的节点并且预测统计MAX中的估计为大的部分路径的延迟分布，其存在于对电路延迟有很大影响的关键路径上， 并且具有改善电路延迟的可能性很高，通过蒙特卡罗模拟而不是基于块的仿真来计算电路图中的节点，从而提高延迟分析的速度和精度。

公开(公告)号：US20090055142A1

公开(公告)日：2009-02-26

申请号：US12190205

申请日：2008-08-12

申请人： Izumi Nitta ,  Toshiyuki Shibuya ,  Katsumi Homma

发明人： Izumi Nitta ,  Toshiyuki Shibuya ,  Katsumi Homma

IPC分类号： G06F7/60 ,  G06F17/10

CPC分类号： G06Q10/06 ,  G06Q10/04

摘要： A method for estimating a man-hours of an entire project having a series of tasks with a computer includes, inputting an estimated man-hours of the each task, acquiring model functions for extracting estimation errors included in the estimated man-hours of the each task based on an attribute of a worker who performs the each task, calculating a probability density distribution representing estimation errors depending on the attribute and a probability density distribution representing modeling errors depending on methods for estimating the man-hours for each task using the model functions, calculating man-hours of the entire project having a series of tasks for the each task using statistical methods to accumulate the probability density distribution representing estimation errors and the probability density distribution representing the modeling errors, and outputting calculating results of man-hours of the entire project to a output device.

摘要翻译： 用计算机具有一系列任务的整个项目的工时估计方法包括：输入每个任务的估计工时，获取用于提取包括在每个任务的估计工时中的估计误差的模型功能 任务基于执行每个任务的工作者的属性，根据属性计算表示估计误差的概率密度分布，以及代表建模误差的概率密度分布，这取决于使用模型函数估计每个任务的工时的方法 使用统计方法计算表示估计误差的概率密度分布和表示建模误差的概率密度分布，计算出每个任务的一系列任务的工时，并输出计算结果 整个项目到一个输出设备。

公开(公告)号：US20080244487A1

公开(公告)日：2008-10-02

申请号：US12073038

申请日：2008-02-28

申请人： Izumi Nitta ,  Toshiyuki Shibuya ,  Katsumi Homma

发明人： Izumi Nitta ,  Toshiyuki Shibuya ,  Katsumi Homma

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A delay analysis support apparatus that supports analysis of delay in a target circuit includes an acquiring unit that acquires error information concerning a cell-delay estimation error that is dependent on a characterizing tool; an error calculating unit that calculates, based on the error information and a first probability density distribution concerning the cell delay of each cell and obtained from the cell delay estimated by the characterizing tool, a second probability density distribution that concerns the cell-delay estimation error of each cell; and an linking unit that links the second probability density distribution and a cell library storing therein the first probability density distribution.

摘要翻译： 支持对目标电路中的延迟进行分析的延迟分析支持装置包括获取单元，其获取与取决于特征化工具有关的信元延迟估计误差的误差信息; 误差计算单元，其基于所述误差信息和关于每个小区的小区延迟并从由所述表征工具估计的小区延迟获得的第一概率密度分布，计算涉及所述小区延迟估计误差的第二概率密度分布 的每个细胞; 以及链接单元，其将第二概率密度分布与其中存储有第一概率密度分布的单元库连接。

公开(公告)号：US08024685B2

公开(公告)日：2011-09-20

申请号：US12073038

申请日：2008-02-28

申请人： Izumi Nitta ,  Toshiyuki Shibuya ,  Katsumi Homma

发明人： Izumi Nitta ,  Toshiyuki Shibuya ,  Katsumi Homma

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A delay analysis support apparatus that supports analysis of delay in a target circuit includes an acquiring unit that acquires error information concerning a cell-delay estimation error that is dependent on a characterizing tool; an error calculating unit that calculates, based on the error information and a first probability density distribution concerning the cell delay of each cell and obtained from the cell delay estimated by the characterizing tool, a second probability density distribution that concerns the cell-delay estimation error of each cell; and an linking unit that links the second probability density distribution and a cell library storing therein the first probability density distribution.

摘要翻译： 支持对目标电路中的延迟进行分析的延迟分析支持装置包括获取单元，其获取与取决于特征化工具有关的信元延迟估计误差的误差信息; 误差计算单元，其基于所述误差信息和关于每个小区的小区延迟并从由所述表征工具估计的小区延迟获得的第一概率密度分布，计算涉及所述小区延迟估计误差的第二概率密度分布 的每个细胞; 以及链接单元，其将第二概率密度分布与其中存储有第一概率密度分布的单元库连接。

公开(公告)号：US07944446B2

公开(公告)日：2011-05-17

申请号：US12002504

申请日：2007-12-17

申请人： Toshiyuki Shibuya ,  Katsumi Homma ,  Izumi Nitta

发明人： Toshiyuki Shibuya ,  Katsumi Homma ,  Izumi Nitta

IPC分类号： G06T11/20 ,  G06F15/16

CPC分类号： G06F17/5031

摘要： Fluctuations of cumulative delay value and delay dispersion in a path of a circuit are displayed graphically. Cumulative delay values of circuit elements in the path are obtained from delay analysis results of the circuit and dispersion is obtained from a probability density distribution of the delay of the circuit elements. Corresponding to the location of the circuit element in the path, the former and the latter are plotted on a coordinate plane.

摘要翻译： 以图形方式显示电路路径中的累积延迟值和延迟色散的波动。 从电路的延迟分析结果获得路径中的电路元件的累积延迟值，并且从电路元件的延迟的概率密度分布获得色散。 对应于电路元件在路径中的位置，前者和后者被绘制在坐标平面上。

公开(公告)号：US20090007044A1

公开(公告)日：2009-01-01

申请号：US12149256

申请日：2008-04-29

申请人： Toshiyuki Shibuya ,  Katsumi Homma ,  Izumi Nitta

发明人： Toshiyuki Shibuya ,  Katsumi Homma ,  Izumi Nitta

IPC分类号： G06F17/50

CPC分类号： G06F17/5045 ,  G06F2217/84

摘要： A design support apparatus includes an extracting unit that extracts a first cell from among plural cells in a target circuit; a detecting unit that detects a second cell arranged adjacent to the first cell; and a setting unit that sets a delay value of the first cell according to an arrangement pattern of the second cell.

摘要翻译： 一种设计支持装置，包括从目标电路中的多个单元中提取第一单元的提取单元; 检测单元，其检测与所述第一单元相邻布置的第二单元; 以及设定单元，其根据第二单元的排列模式来设定第一单元的延迟值。

公开(公告)号：US20080148205A1

公开(公告)日：2008-06-19

申请号：US11902489

申请日：2007-09-21

申请人： Katsumi Homma ,  Hidetoshi Matsuoka ,  Izumi Nitta ,  Toshiyuki Shibuya

发明人： Katsumi Homma ,  Hidetoshi Matsuoka ,  Izumi Nitta ,  Toshiyuki Shibuya

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F2217/10 ,  G06F2217/84

摘要： Delay analysis performed on a circuit having multiple parallel partial circuits (paths) involves recursively integrating two paths of the circuit using an all-element delay distribution that indicates delay based on performance of all circuit elements in a path and a correlation delay distribution that indicates delay based on correlation between circuit elements in the path. An all-element delay distribution is calculated for the integrated path using the all-element delay distributions of the two paths to be integrated. The all-element delay distributions and the correlation delay distributions of two paths to be integrated are used to calculate a total delay distribution for the integrated path. The total delay distribution is used with the all-element delay distribution for the integrated path to calculate a correlation delay distribution for the integrated path. Through recursive calculation, a delay distribution of the circuit is estimated.

摘要翻译： 对具有多个并行部分电路（路径）的电路进行延迟分析涉及使用基于路径中的所有电路元件的性能的指示延迟的全元延迟分布递归地积分电路的两个路径，以及指示延迟的相关延迟分布 基于路径中的电路元件之间的相关性。 使用要集成的两个路径的全元素延迟分布，针对集成路径计算全元素延迟分布。 要整合的两个路径的全元素延迟分布和相关延迟分布用于计算集成路径的总延迟分布。 总延迟分布与集成路径的全元素延迟分布一起使用，以计算集成路径的相关延迟分布。 通过递归计算，估计电路的延迟分布。

公开(公告)号：US20100017765A1

公开(公告)日：2010-01-21

申请号：US12409187

申请日：2009-03-23

申请人： Katsumi Homma

发明人： Katsumi Homma

IPC分类号： G06F17/50

CPC分类号： H01L22/34 ,  H01L27/0203

摘要： A monitor position determining apparatus includes an acquiring unit that acquires design data concerning circuit elements arranged in a layout of a semiconductor device and for each of the circuit elements, yield sensitivity data indicative of a percentage of change with respect to a yield ratio of the semiconductor device; a selecting unit that selects, based on the yield sensitivity data, a circuit element from a circuit element group arranged in the layout; a determining unit that determines an arrangement position in the layout to be an installation position of a monitor that measures a physical amount in the semiconductor device in a measurement region, the arrangement position being of the circuit element that is specified from the design data acquired by the acquiring unit and selected by the selecting unit; and an output unit that outputs the installation position determined by the determining unit.

摘要翻译： 监视器位置确定装置包括获取单元，其获取关于以半导体器件的布局布置的电路元件的设计数据，并且对于每个电路元件，指示相对于半导体的屈服比的变化百分比的屈服敏感度数据 设备; 选择单元，其基于所述产量灵敏度数据，从布置在布局中的电路元件组中选择电路元件; 确定单元，其将所述布局中的布置位置确定为测量所述半导体器件中的测量区域中的物理量的监视器的安装位置，所述布置位置是根据由所述设计数据获取的设计数据指定的所述电路元件， 所述获取单元由所述选择单元选择; 以及输出单元，其输出由确定单元确定的安装位置。

公开(公告)号：US20060236279A1

公开(公告)日：2006-10-19

申请号：US11167296

申请日：2005-06-28

申请人： Katsumi Homma

发明人： Katsumi Homma

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A design supporting apparatus includes a detecting unit that detects a path constituting a circuit from circuit information of the circuit; a sensitivity-equation producing unit that produces a calculating equation for a sensitivity indicating a change rate of a parameter regarding a delay of a circuit element constituting the path, for every path detected; and an element-sensitivity calculating unit that calculates a sensitivity of the circuit element by using the calculating equation produced.

摘要翻译： 一种设计支持装置，包括：检测单元，根据电路的电路信息检测构成电路的路径; 敏感度方程式产生单元，对于检测到的每个路径，产生用于表示关于构成路径的电路元件的延迟的参数的变化率的灵敏度的计算方程; 以及元件敏感度计算单元，其通过使用所产生的计算公式来计算电路元件的灵敏度。

公开(公告)号：US06768976B1

公开(公告)日：2004-07-27

申请号：US09420597

申请日：1999-10-19

申请人： Katsumi Homma ,  Makoto Mukai ,  Yoshirou Tanaka

发明人： Katsumi Homma ,  Makoto Mukai ,  Yoshirou Tanaka

IPC分类号： G06F1750

CPC分类号： G06F17/5036

摘要： When an electric current flowing through an electronic appliance is simulated by solving simultaneous linear equations defined depending on an analytic frequency, the simultaneous linear equations are solved in the direct method using a frequency other than the frequencies on both ends of an analytic frequency area as an analysis target, and the simultaneous linear equations are solved in the iterative method while transforming the simultaneous linear equations using the coefficient matrix analyzed in the direct method on the frequencies other than the above described frequency defined as the analysis target.

摘要翻译： 当通过解决根据分析频率定义的联立线性方程来模拟流过电子设备的电流时，使用除分析频率区域的两端的频率之外的频率作为直接方法来解决联立线性方程式 分析目标，并行联立线性方程式，在使用直接方法分析的系数矩阵对除上述定义为分析目标的频率以外的频率的同时线性方程进行变换的同时求解方法。