Method and apparatus providing cancellation of second order intermodulation distortion and enhancement of second order intercept point (IIP2) in common source and common emitter transconductance circuits
    11.
    发明授权
    Method and apparatus providing cancellation of second order intermodulation distortion and enhancement of second order intercept point (IIP2) in common source and common emitter transconductance circuits 有权
    在共源极和公共发射极跨导电路中提供二阶互调失真的消除和二阶截取点(IIP2)的增强的方法和装置

    公开(公告)号:US06992519B2

    公开(公告)日:2006-01-31

    申请号:US10777927

    申请日:2004-02-11

    IPC分类号: G06G7/12

    摘要: A transconductor circuit includes a first input device M1 and a second input device M2 each having a control terminal coupled to a radio frequency input signal, and a bias setting device MB having a control terminal coupled to the radio frequency input signal and an output coupled to the control terminal of each of said M1 and M2. MB is partitioned into two equal sized bias setting devices MB1 and MB2. In the preferred embodiment MB1 and MB2 are coupled to the control terminals of M1 and M2 for establishing a bias voltage at the control terminals of M1 and M2. The circuit is shown to substantially cancel second-order intermodulation distortion and to enhance a second order intercept point.

    摘要翻译: 跨导电路包括每个具有耦合到射频输入信号的控制端的第一输入设备M 1和第二输入设备M 2,以及偏置设置设备M 具有耦合到射频输入信号的控制终端和耦合到所述M 1和M 2中的每一个的控制端的输出端 。 M B B被分成两个相等大小的偏置设定装置M B1和M B2。 在优选实施例中,M B1和M B2连接到M 1和M 2的控制端,用于 在M 1和M 2 2的控制端建立偏置电压。 该电路被显示为基本上消除二阶互调失真并增强二阶截取点。

    Gain stabilization technique for narrow band integrated low noise amplifiers
    12.
    发明授权
    Gain stabilization technique for narrow band integrated low noise amplifiers 有权
    窄带集成低噪声放大器的增益稳定技术

    公开(公告)号:US06963247B2

    公开(公告)日:2005-11-08

    申请号:US10719589

    申请日:2003-11-21

    摘要: A resonant load circuit is disposed in an integrated circuit, where the resonant load circuit includes an integrated inductance in parallel with an integrated capacitance, and further includes a first integrated resistance Rs in series with one of the inductance and capacitance, preferably in series with the inductance, and a second integrated resistance Rp in parallel with the inductance and capacitance. The first and second integrated resistances have values selected for reducing an amount of resonant load circuit Q over a plurality of instances of the integrated circuit. In a preferred, but non-limiting, embodiment the resonant load circuit forms a load in an RF low noise amplifier, such as a balanced inductively degenerated common source low noise amplifier (LNA).

    摘要翻译: 谐振负载电路设置在集成电路中,其中谐振负载电路包括与集成电容并联的集成电感,并且还包括与电感之一串联的第一集成电阻R SUB 和电容,优选地与电感串联,以及与电感和电容并联的第二集成电阻R p。 第一和第二集成电阻具有选择用于在集成电路的多个实例上减少谐振负载电路Q的量的值。 在优选但非限制性的实施例中,谐振负载电路在RF低噪声放大器(例如平衡电感退化的公共源低噪声放大器(LNA))中形成负载。