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公开(公告)号:US4348741A
公开(公告)日:1982-09-07
申请号:US169558
申请日:1980-07-17
CPC分类号: G06F7/74 , G06F9/30043 , H03M11/02
摘要: Each channel of a priority encoder register is equipped with a latch for storing one bit of a binary data word. The channel of highest priority generates an output which is applied to encoding means which in turn generates a unique code. The channel output is also fed back to reset its associated latch to permit the channel of next highest priority to generate an output.
摘要翻译: 优先编码器寄存器的每个通道配备有用于存储二进制数据字的一位的锁存器。 最高优先级的信道产生应用于编码装置的输出,该编码装置又产生唯一的码。 信道输出也被反馈以复位其相关联的锁存器,以允许下一个最高优先级的信道生成输出。