公开(公告)号：US20210090666A1

公开(公告)日：2021-03-25

申请号：US17008209

申请日：2020-08-31

Applicant: KIOXIA CORPORATION

Inventor： Mario SAKO ,  Hiromitsu KOMAI ,  Masahiro YOSHIHARA

IPC: G11C16/26 ,  H01L23/522 ,  G11C16/04 ,  G11C16/10

Abstract: A semiconductor memory device includes a bit line, a first memory cell electrically connected to the bit line, and a sense amplifier connected to the bit lin. The sense amplifier includes a first capacitor element having an electrode that is connected to a first node electrically connectable to the bit line, a first transistor having a gate connected to the first node and a first end connectable to a second node, a second transistor having a first end connected to the second node and a second end connected to a third node, a second capacitor element having an electrode connected to the third node, and a latch circuit connected to the second node.