公开(公告)号：US5101303A

公开(公告)日：1992-03-31

申请号：US327138

申请日：1989-03-22

申请人： Yutaka Maeda ,  Kiyotaka Kaneko ,  Izumi Miyake ,  Yoshio Nakane ,  Hiroshi Shimaya

发明人： Yutaka Maeda ,  Kiyotaka Kaneko ,  Izumi Miyake ,  Yoshio Nakane ,  Hiroshi Shimaya

IPC分类号： G11B5/596

CPC分类号： G11B5/59611

摘要： A search range for detecting the peak position of an envelope on a rotating magnetic recording medium is limited to a predetermined range on either side of an absolute track position of each track on the recording medium. A limitation is also placed upon the number of times a magnetic head is fed within this predetermined range. If a peak cannot be decided even when the magnetic head is fed the limited number of times, the final position of the magnetic head is adopted compulsorily as the peak position. As a result it is possible to reduce the time needed for peak position detection processing. When an envelope cannot be detected with the predetermined range, the absolute track position is adopted as the peak position.

摘要翻译： 用于检测旋转磁记录介质上的信封的峰值位置的搜索范围被限制在记录介质上每个磁道的绝对磁道位置的任一侧的预定范围。 磁头在该预定范围内进给的次数也受到限制。 如果即使在磁头供给有限次数时也不能决定峰值，则磁头的最终位置被强制地用作峰值位置。 结果，可以减少峰值位置检测处理所需的时间。 当在预定范围内不能检测到信封时，采用绝对轨道位置作为峰值位置。

公开(公告)号：US4972223A

公开(公告)日：1990-11-20

申请号：US363711

申请日：1989-06-09

申请人： Kiyotaka Kaneko ,  Izumi Miyake ,  Yoshio Nakane ,  Yutaka Maeda ,  Hiroshi Shimaya

发明人： Kiyotaka Kaneko ,  Izumi Miyake ,  Yoshio Nakane ,  Yutaka Maeda ,  Hiroshi Shimaya

IPC分类号： G03B7/097 ,  H04N5/225 ,  H04N5/235 ,  H04N5/238

CPC分类号： H04N5/2352 ,  G03B7/097

摘要： A camera having an ordinary automatic exposure function which automatically decides a proper shutter speed and f-stop based on the results of photometry is additionally provided with a slow-photography mode. When the camera is set to the slow-photography mode, a predetermined shutter speed and f-stop outside a range of shutter speeds and f-stops capable of being set by ordinary automatic exposure control is set. This makes it possible to photograph night scenes, fireworks displays and the like. Photography is possible even in a light-value region in which the camera shutter would be locked against release in ordinary automatic exposure control owing to too little light.

摘要翻译： 具有普通自动曝光功能的照相机还具有慢拍摄模式，该照相机根据测光结果自动决定适当的快门速度和f-stop。 当相机设置为慢拍摄模式时，设置能够通过普通自动曝光控制设定的快门速度范围和f档位之外的预定快门速度和f-stop。 这使得可以拍摄夜景，烟花表演等。 即使在光线不足的地方也可以进行拍摄，即使在普通的自动曝光控制中，由于光线太少，相机快门将被锁定而不能释放。

公开(公告)号：US5262868A

公开(公告)日：1993-11-16

申请号：US819813

申请日：1992-01-13

申请人： Kiyotaka Kaneko ,  Hiroshi Shimaya ,  Izumi Miyake

发明人： Kiyotaka Kaneko ,  Hiroshi Shimaya ,  Izumi Miyake

IPC分类号： G03B7/00 ,  G03B7/26 ,  G06F1/28 ,  G11C5/00 ,  H04N1/00 ,  H04N1/21 ,  H04N5/926 ,  H04N5/225 ,  H04N5/30

CPC分类号： H04N1/00899 ,  H04N1/2112 ,  H04N1/2137 ,  H04N1/2158 ,  H04N5/9264 ,  H04N5/9265 ,  H04N1/00885 ,  H04N2101/00

摘要： A memory card has a volatile semiconductor memory for storing therein image data, a built-in battery as a backup power for preserving the image data in the volatile semiconductor memory, and a non-volatile memory for storing therein data related to an alarm of a decrease in a voltage of the built-in battery. When the memory card is loaded on the digital, electronic, still camera, the data concerning the alarm state is read from the loaded memory card and the voltage value of the battery is sensed. If the value of the battery voltage thus determined is less than a threshold voltage attained from the data read from the memory card, an alarm is notified.

摘要翻译： 存储卡具有用于在其中存储图像数据的易失性半导体存储器，作为用于保存易失性半导体存储器中的图像数据的备用电力的内置电池和用于存储与易失性半导体存储器的警报有关的数据的非易失性存储器 降低内置电池的电压。 当存储卡装载在数字，电子，静态照相机上时，从装载的存储卡中读取有关报警状态的数据，并检测电池的电压值。 如果如此确定的电池电压的值小于从从存储卡读取的数据获得的阈值电压，则通知警报。

公开(公告)号：US5210568A

公开(公告)日：1993-05-11

申请号：US915876

申请日：1992-07-20

申请人： Izumi Miyake ,  Kiyotaka Kaneko ,  Hiroshi Shimaya ,  Masanaga Yamamoto ,  Masanori Yoshida

发明人： Izumi Miyake ,  Kiyotaka Kaneko ,  Hiroshi Shimaya ,  Masanaga Yamamoto ,  Masanori Yoshida

IPC分类号： G03B7/26

CPC分类号： G03B7/26 ,  G03B2217/007

摘要： In a camera having a power source shared between a charging circuit for a strobe emission and a camera function section other than the charging circuit, the charging operation is inhibited during an operation of the camera function section and a battery check is inhibited during the charging operation. As a result, a runaway of a CPU of the camera due to the voltage reduction of the power source in the charging operation is avoided; moreover, inhibition of a shooting operation due to the battery check is prevented, thereby efficiently utilizing the battery capacity.

摘要翻译： 在具有用于选通发光的充电电路和除了充电电路之外的相机功能部分之间共享电源的相机中，在相机功能部分的操作期间禁止充电操作，并且在充电操作期间禁止电池检查 。 结果，避免了由于充电操作中的电源的电压降低导致的相机的CPU失控; 此外，防止了由于电池检查而导致的拍摄操作的抑制，从而有效地利用电池容量。

公开(公告)号：US07420495B2

公开(公告)日：2008-09-02

申请号：US11634249

申请日：2006-12-06

申请人： Hiroshi Shimaya

发明人： Hiroshi Shimaya

IPC分类号： H03M1/66

CPC分类号： H03M1/066 ,  H03M1/742

摘要： An object of the present invention is to form a highly accurate current source for D/A converters. Letters from a1 to an where n is at least 4 represent current source cells that output constant currents, each of which is composed of MOS transistors etc. These current source cells are arranged in two dimensional matrix and a plurality of these current source cells are connected to form a current source that has a predetermined current value. Current source cells in any one row of the two dimensional matrix are labeled with letters from a1 to an. A first kind of row is in the same order as this row. A second kind of row is obtained from the first kind of row by exchanging a series of elements being letters from ai to ai+j where both i and j are integers at least 1 and i+j is an integer not more than n/2 with a series of elements being letters from ak to ak+j where k is an integer larger than n/2 and k+j is an integer not more than n. The two dimensional matrix comprises a same number of these two kinds of row.

摘要翻译： 本发明的目的是形成用于D / A转换器的高精度电流源。 从n至少为4的<1> 至的字母表示输出恒定电流的电流源单元，每个电流源由MOS晶体管等构成。这些电流源单元 被布置成二维矩阵，并且多个这些电流源单元被连接以形成具有预定电流值的电流源。 二维矩阵的任何一行中的当前源单元格用从<1> 的字母标记。 第一行与此行的顺序相同。 从第一种行获得第二种类型的行是通过将一系列元素作为从 _{i 的字母交换到其中i和j都是整数的元素 至少1和i + j是不大于n / 2的整数，其中一系列元素是从＆lt; k＆gt;至＆lt; k + j＆gt;的字母，其中k是整数 大于n / 2且k + j是不大于n的整数。 二维矩阵包括相同数量的这两种行。}

公开(公告)号：US20070126617A1

公开(公告)日：2007-06-07

申请号：US11634249

申请日：2006-12-06

申请人： Hiroshi Shimaya

发明人： Hiroshi Shimaya

IPC分类号： H03M1/66

CPC分类号： H03M1/066 ,  H03M1/742

摘要： An object of the present invention is to form a highly accurate current source for D/A converters. Letters from a1 to an where n is at least 4 represent current source cells that output constant currents, each of which is composed of MOS transistors etc. These current source cells are arranged in two dimensional matrix and a plurality of these current source cells are connected to form a current source that has a predetermined current value. Current source cells in any one row of the two dimensional matrix are labeled with letters from a1 to an. A first kind of row is in the same order as this row. A second kind of row is obtained from the first kind of row by exchanging a series of elements being letters from ai to ai+j where both i and j are integers at least 1 and i+j is an integer not more than n/2 with a series of elements being letters from ak to ak+j where k is an integer larger than n/2 and k+j is an integer not more than n. The two dimensional matrix comprises a same number of these two kinds of row.

摘要翻译： 本发明的目的是形成用于D / A转换器的高精度电流源。 从n至少为4的<1> 至的字母表示输出恒定电流的电流源单元，每个电流源由MOS晶体管等构成。这些电流源单元 被布置成二维矩阵，并且多个这些电流源单元被连接以形成具有预定电流值的电流源。 二维矩阵的任何一行中的当前源单元格用从<1> 的字母标记。 第一行与此行的顺序相同。 从第一种行获得第二种类型的行是通过将一系列元素作为从 _{i 的字母交换到其中i和j都是整数的元素 至少1和i + j是不大于n / 2的整数，其中一系列元素是从＆lt; k＆gt;至＆lt; k + j＆gt;的字母，其中k是整数 大于n / 2且k + j是不大于n的整数。 二维矩阵包括相同数量的这两种行。}

公开(公告)号：US20060226875A1

公开(公告)日：2006-10-12

申请号：US11395374

申请日：2006-04-03

申请人： Hiroshi Shimaya

发明人： Hiroshi Shimaya

IPC分类号： H03K19/0175

CPC分类号： H03K3/356182

摘要： A level shifter circuit has first to fourth transistors and a resistive element. The first transistor is activated in response to a logic signal whose high level voltage is a first voltage. The second transistor is activated in response to the inverse logic signal. Each of the first and second transistors is connected between a power supply line for supplying a second voltage and a ground line. The third transistor is connected to a drain of the first transistor through a first node. The fourth transistor is connected to a drain of the second transistor through a second node. A gate of the third transistor is connected to the drain of the second transistor through the second node. A gate of the fourth transistor is connected to the drain of the first transistor through the first node. The resistive element is connected between the first node and the second node.

公开(公告)号：US5579049A

公开(公告)日：1996-11-26

申请号：US171177

申请日：1993-12-22

申请人： Hiroshi Shimaya ,  Yutaka Maeda ,  Chiaki Ichikawa ,  Toshio Nakajima

发明人： Hiroshi Shimaya ,  Yutaka Maeda ,  Chiaki Ichikawa ,  Toshio Nakajima

IPC分类号： H04N5/235 ,  H04N5/238

CPC分类号： H04N5/2352 ,  H04N5/2353

摘要： An object of the present invention is to bring a video signal obtained by imaging into a proper level without use of a controllable diaphragm. An imaging apparatus is provided with no controllable diaphragm. Peak detection is performed by a peak detecting circuit for each vertical scanning interval. A peak value is applied to a control device. Necessary shutter speed control in a shutter control circuit, gain control in a pre-amplifier circuit and gain control in a GCA are carried out. Consequently, the level of the video signal obtained by the imaging is adjusted to a proper level without controlling a diaphragm, to obtain an image of proper brightness.

摘要翻译： 本发明的目的是将通过成像获得的视频信号带入适当的水平而不使用可控制的隔膜。 没有可控制的膜片的成像装置。 峰值检测由每个垂直扫描间隔的峰值检测电路执行。 将峰值应用于控制装置。 执行快门控制电路中必要的快门速度控制，前置放大器电路中的增益控制和GCA中的增益控制。 因此，通过成像获得的视频信号的电平在不控制光阑的情况下被调整到适当的水平，以获得适当亮度的图像。

公开(公告)号：US08675042B2

公开(公告)日：2014-03-18

申请号：US13073435

申请日：2011-03-28

申请人： Hiroshi Shimaya

发明人： Hiroshi Shimaya

IPC分类号： H04N7/00

CPC分类号： G06T3/4038 ,  G06T7/97 ,  H04N13/128 ,  H04N13/239

摘要： A distance to an object is measured for each of a series of left images, and the count of a distance range including the calculated distance increases. A distance range with the highest frequency of appearance is specified from the counter information of a distance table counter, and a left image in which the distance included in the specified distance range is measured is selected. The adjustment amount of the parallax amount adjusted for the selected left image and a corresponding right image is determined to be the adjustment amount of the parallax amount of a panorama image. A series of left images is combined to generate a panorama image and a series of right images is combined to generate a panorama image. A panorama image displayed in stereoscopic view is generated based on the determined adjustment amount of the parallax amount.

摘要翻译： 对于一系列左图像中的每一个测量到物体的距离，并且包括计算的距离的距离范围的计数增加。 从距离台计数器的计数器信息中指定出现频率最高的距离范围，并且选择测量在指定距离范围内的距离的左图像。 将对于所选择的左图像和对应的右图像调整的视差量的调整量确定为全景图像的视差量的调整量。 组合一系列左图像以生成全景图像，并且组合一系列正确的图像以生成全景图像。 基于所确定的视差量的调整量，生成以立体视图显示的全景图像。

公开(公告)号：US07514960B2

公开(公告)日：2009-04-07

申请号：US11395374

申请日：2006-04-03

申请人： Hiroshi Shimaya

发明人： Hiroshi Shimaya

IPC分类号： H03K19/0175

CPC分类号： H03K3/356182

摘要： A level shifter circuit has first to fourth transistors and a resistive element. The first transistor is activated in response to a logic signal whose high level voltage is a first voltage. The second transistor is activated in response to the inverse logic signal. Each of the first and second transistors is connected between a power supply line for supplying a second voltage and a ground line. The third transistor is connected to a drain of the first transistor through a first node. The fourth transistor is connected to a drain of the second transistor through a second node. A gate of the third transistor is connected to the drain of the second transistor through the second node. A gate of the fourth transistor is connected to the drain of the first transistor through the first node. The resistive element is connected between the first node and the second node.

摘要翻译： 电平移位器电路具有第一至第四晶体管和电阻元件。 第一晶体管响应于高电平电压为第一电压的逻辑信号被激活。 第二晶体管响应于反逻辑信号被激活。 第一和第二晶体管中的每一个连接在用于提供第二电压的电源线和接地线之间。 第三晶体管通过第一节点连接到第一晶体管的漏极。 第四晶体管通过第二节点连接到第二晶体管的漏极。 第三晶体管的栅极通过第二节点连接到第二晶体管的漏极。 第四晶体管的栅极通过第一节点连接到第一晶体管的漏极。 电阻元件连接在第一节点和第二节点之间。