公开(公告)号：US09147416B2

公开(公告)日：2015-09-29

申请号：US14217833

申请日：2014-03-18

Applicant: LSI Corporation

Inventor： Jeffrey P. Grundvig ,  Richard Rauschmayer ,  Yu Liao ,  Jin Lu ,  Edward J. D'Avignon

IPC: G11B5/48 ,  G11B5/09 ,  G11B5/596 ,  G11B5/39 ,  G11B20/10

CPC classification number: G11B5/4886 ,  G06F17/30424 ,  G11B5/09 ,  G11B5/3958 ,  G11B5/3967 ,  G11B5/3977 ,  G11B5/4866 ,  G11B5/59616 ,  G11B5/59627 ,  G11B5/59644 ,  G11B20/10259

Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for processing servo data using two or more sensing heads.

Abstract translation: 用于数据处理的系统，方法，设备，电路，更具体地涉及使用两个或更多个感测头来处理伺服数据的系统和方法。

公开(公告)号：US09099132B1

公开(公告)日：2015-08-04

申请号：US14217805

申请日：2014-03-18

Applicant: LSI Corporation

Inventor： Jeffrey P. Grundvig ,  Richard Rauschmayer ,  Jin Lu

IPC: G11B5/09 ,  G11B5/596 ,  G11B5/48

CPC classification number: G11B5/4886 ,  G06F17/30424 ,  G11B5/09 ,  G11B5/3958 ,  G11B5/3967 ,  G11B5/3977 ,  G11B5/4866 ,  G11B5/59616 ,  G11B5/59627 ,  G11B5/59644 ,  G11B20/10259

Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for determining a down track distance between two or more read heads on a read/write head assembly.

Abstract translation: 用于数据处理的系统，方法，设备，电路，更具体地涉及用于确定读/写头组件上的两个或更多读头之间的下行轨道距离的系统和方法。

公开(公告)号：US08837068B1

公开(公告)日：2014-09-16

申请号：US14259424

申请日：2014-04-23

Applicant: LSI Corporation

Inventor： Yu Liao ,  Jeffrey P. Grundvig ,  Jin Lu ,  Richard Rauschmayer

IPC: G11B5/09

CPC classification number: G11B5/59688 ,  G11B5/59622

Abstract: A servo system includes multiple interpolators operable to interpolate equalized data for multiple signal paths in a two dimensional magnetic recording system to yield interpolated signals at different phases, scaling circuits operable to scale the interpolated signals by adaptive scaling factors, a signal combining circuit operable to combine the scaled signals, a phase tracking circuit operable to select one of the phases of the combined signal, and an error gradient circuit operable to adapt the adaptive scaling factors.

Abstract translation: 伺服系统包括多个内插器，其可操作以在二维磁记录系统中内插多个信号路径的均衡数据，以产生不同相位的内插信号，缩放电路可操作以通过自适应缩放因子缩放内插信号;信号组合电路，可操作以组合 缩放信号，可操作以选择组合信号的相位之一的相位跟踪电路和可操作以适应自适应缩放因子的误差梯度电路。