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公开(公告)号：US09252989B2
公开(公告)日：2016-02-02
申请号：US13628513
申请日：2012-09-27
Applicant: LSI Corporation
Inventor： Jin Lu , Shaohua Yang , Weijun Tan
CPC classification number: H04L25/03038
Abstract: A data dependent equalizer circuit includes a plurality of noise prediction filters. Respective ones of the noise prediction filters are configured to filter noise in sample data for at least one predetermined non-return to zero (NRZ) condition. A plurality of equalizers is communicatively coupled with the plurality of noise prediction filters. Respective ones of the plurality of equalizers are configured to yield equalized sample data that corresponds to the at least one predetermined NRZ condition for one or more of the noise prediction filters.
Abstract translation: 数据相关均衡器电路包括多个噪声预测滤波器。 各个噪声预测滤波器被配置为在至少一个预定的不归零（NRZ）条件下滤波采样数据中的噪声。 多个均衡器与多个噪声预测滤波器通信耦合。 多个均衡器中的各个均衡器被配置为产生对应于一个或多个噪声预测滤波器的至少一个预定NRZ条件的均衡样本数据。
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公开(公告)号：US20150243310A1
公开(公告)日：2015-08-27
申请号：US14217805
申请日：2014-03-18
Applicant: LSI Corporation
Inventor： Jeffrey P. Grundvig , Richard Rauschmayer , Jin Lu
IPC: G11B5/48
CPC classification number: G11B5/4886 , G06F17/30424 , G11B5/09 , G11B5/3958 , G11B5/3967 , G11B5/3977 , G11B5/4866 , G11B5/59616 , G11B5/59627 , G11B5/59644 , G11B20/10259
Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for determining a down track distance between two or more read heads on a read/write head assembly.
Abstract translation: 用于数据处理的系统，方法，设备，电路，更具体地涉及用于确定读/写头组件上的两个或更多读头之间的下行轨道距离的系统和方法。
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公开(公告)号：US20150243322A1
公开(公告)日：2015-08-27
申请号：US14217833
申请日：2014-03-18
Applicant: LSI Corporation
Inventor： Jeffrey P. Grundvig , Richard Rauschmayer , Yu Liao , Jin Lu , Edward J. D'Avignon
CPC classification number: G11B5/4886 , G06F17/30424 , G11B5/09 , G11B5/3958 , G11B5/3967 , G11B5/3977 , G11B5/4866 , G11B5/59616 , G11B5/59627 , G11B5/59644 , G11B20/10259
Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for processing servo data using two or more sensing heads.
Abstract translation: 用于数据处理的系统，方法，设备，电路，更具体地涉及使用两个或更多个感测头来处理伺服数据的系统和方法。
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公开(公告)号：US08922934B2
公开(公告)日：2014-12-30
申请号：US13912159
申请日：2013-06-06
Applicant: LSI Corporation
Inventor： Jin Lu , Shaohua Yang
CPC classification number: G11B20/10037 , G11B20/10046 , H04L25/03025 , H04L25/061 , H04L25/067
Abstract: Systems, methods, devices, circuits for transition based equalization.
Abstract translation: 用于基于过渡的均衡的系统，方法，设备，电路。
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公开(公告)号：US20140268390A1
公开(公告)日：2014-09-18
申请号：US13912159
申请日：2013-06-06
Applicant: LSI Corporation
Inventor： Jin Lu , Shaohua Yang
CPC classification number: G11B20/10037 , G11B20/10046 , H04L25/03025 , H04L25/061 , H04L25/067
Abstract: Systems, methods, devices, circuits for transition based equalization.
Abstract translation: 用于基于过渡的均衡的系统，方法，设备，电路。
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Patent Agency Ranking
公开(公告)号：US08810949B2
公开(公告)日：2014-08-19
申请号：US13724962
申请日：2012-12-21
Applicant: LSI Corporation
Inventor： Jin Lu , Weijun Tan , Shaohua Yang
CPC classification number: G11B20/10287 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry. The signal processing circuitry comprises: an equalizer configured to combine an output of two or more component filters into a single equalized data signal; a detector with an input coupled to an output of the equalizer configured to determine a set of soft outputs, hard decision information and reliability indicators of the single equalized data signal; a decoder with an input coupled to an output of the decoder configured to perform an iterative decoding process using the set of soft outputs, hard decision information and reliability indicators to determine a decoded data signal; and a multiplexer with a first input coupled to an output of the decoder, a second input coupled to an output of the detector, and an output coupled to an input of the equalizer. The hard decision information is used to train the equalizer.
Abstract translation: 一种装置包括读通道电路和相关的信号处理电路。 信号处理电路包括：均衡器，被配置为将两个或更多个分量滤波器的输出组合成单个均衡数据信号; 具有耦合到所述均衡器的输出的输入的检测器，被配置为确定所述单个均衡数据信号的一组软输出，硬判决信息和可靠性指示符; 解码器，具有耦合到所述解码器的输出的输入，所述输出被配置为使用所述一组软输出执行迭代解码处理，硬判决信息和可靠性指示符，以确定解码的数据信号; 以及多路复用器，其具有耦合到解码器的输出的第一输入，耦合到检测器的输出的第二输入和耦合到均衡器的输入的输出。 硬判决信息用于训练均衡器。
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公开(公告)号：US08810948B2
公开(公告)日：2014-08-19
申请号：US13722296
申请日：2012-12-20
Applicant: LSI Corporation
Inventor： Shaohua Yang , Jin Lu , Weijun Tan
CPC classification number: G11B20/10 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to: equalize an oversampled digital data signal to determine an equalized digital data signal, filter the equalized digital data signal, determine a hard decision and reliability of the filtered digital data signal, and decode the filtered digital data signal based at least in part on the hard decision and reliability. The oversampled digital data signal comprises a first set of sampled digital data and a corresponding second set of sampled digital data, each of the samples in the first set of sampled digital data being offset from a corresponding one of the sample in the second set of sampled digital data by a phase difference.
Abstract translation: 一种装置包括读通道电路和与读通道电路相关联的信号处理电路。 信号处理电路被配置为：对过采样的数字数据信号进行均衡以确定均衡的数字数据信号，滤除均衡的数字数据信号，确定滤波数字数据信号的硬判决和可靠性，以及基于滤波的数字数据信号进行解码 至少部分在于硬的决定和可靠性。 过采样的数字数据信号包括第一组采样数字数据和相应的第二组采样数字数据，第一组采样数字数据中的每个样本与第二组采样数据中的样本中相应的一个采样偏移 数字数据由相位差组成。
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公开(公告)号：US20140177087A1
公开(公告)日：2014-06-26
申请号：US13724962
申请日：2012-12-21
Applicant: LSI CORPORATION
Inventor： Jin Lu , Weijun Tan , Shaohua Yang
IPC: G11B20/10
CPC classification number: G11B20/10287 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry. The signal processing circuitry comprises: an equalizer configured to combine an output of two or more component filters into a single equalized data signal; a detector with an input coupled to an output of the equalizer configured to determine a set of soft outputs, hard decision information and reliability indicators of the single equalized data signal; a decoder with an input coupled to an output of the detector configured to perform an iterative decoding process using the set of soft outputs, hard decision information and reliability indicators to determine a decoded data signal; and a multiplexer with a first input coupled to an output of the decoder, a second input coupled to an output of the detector, and an output coupled to an input of the equalizer. The hard decision information is used to train the equalizer.
Abstract translation: 一种装置包括读通道电路和相关的信号处理电路。 信号处理电路包括：均衡器，被配置为将两个或更多个分量滤波器的输出组合成单个均衡数据信号; 具有耦合到所述均衡器的输出的输入的检测器，被配置为确定所述单个均衡数据信号的一组软输出，硬判决信息和可靠性指示符; 解码器，具有耦合到所述检测器的输出的输入，被配置为使用所述一组软输出执行迭代解码处理，硬判决信息和可靠性指示符，以确定解码的数据信号; 以及多路复用器，其具有耦合到解码器的输出的第一输入，耦合到检测器的输出的第二输入和耦合到均衡器的输入的输出。 硬判决信息用于训练均衡器。
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公开(公告)号：US20140177082A1
公开(公告)日：2014-06-26
申请号：US13722296
申请日：2012-12-20
Applicant: LSI CORPORATION
Inventor： Shaohua Yang , Jin Lu , Weijun Tan
IPC: G11B20/10
CPC classification number: G11B20/10 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to: equalize an oversampled digital data signal to determine an equalized digital data signal, filter the equalized digital data signal, determine a hard decision and reliability of the filtered digital data signal, and decode the filtered digital data signal based at least in part on the hard decision and reliability. The oversampled digital data signal comprises a first set of sampled digital data and a corresponding second set of sampled digital data, each of the samples in the first set of sampled digital data being offset from a corresponding one of the sample in the second set of sampled digital data by a phase difference.
Abstract translation: 一种装置包括读通道电路和与读通道电路相关联的信号处理电路。 信号处理电路被配置为：对过采样的数字数据信号进行均衡以确定均衡的数字数据信号，滤除均衡的数字数据信号，确定滤波数字数据信号的硬判决和可靠性，以及基于滤波的数字数据信号进行解码 至少部分在于硬的决定和可靠性。 过采样的数字数据信号包括第一组采样数字数据和相应的第二组采样数字数据，第一组采样数字数据中的每个样本与第二组采样数据中的样本中相应的一个采样偏移 数字数据由相位差组成。
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公开(公告)号：US20140086298A1
公开(公告)日：2014-03-27
申请号：US13628513
申请日：2012-09-27
Applicant: LSI CORPORATION
Inventor： Jin Lu , Shaohua Yang , Weijun Tan
IPC: H04L27/01
CPC classification number: H04L25/03038
Abstract: A data dependent equalizer circuit includes a plurality of noise prediction filters. Respective ones of the noise prediction filters are configured to filter noise in sample data for at least one predetermined non-return to zero (NRZ) condition. A plurality of equalizers is communicatively coupled with the plurality of noise prediction filters. Respective ones of the plurality of equalizers are configured to yield equalized sample data that corresponds to the at least one predetermined NRZ condition for one or more of the noise prediction filters.
Abstract translation: 数据相关均衡器电路包括多个噪声预测滤波器。 各个噪声预测滤波器被配置为在至少一个预定的不归零（NRZ）条件下滤波采样数据中的噪声。 多个均衡器与多个噪声预测滤波器通信耦合。 多个均衡器中的各个均衡器被配置为产生对应于一个或多个噪声预测滤波器的至少一个预定NRZ条件的均衡样本数据。
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