Structure and method for fabricating semiconductor structures and devices with integrated control components
    11.
    发明申请
    Structure and method for fabricating semiconductor structures and devices with integrated control components 审中-公开
    用于制造具有集成控制元件的半导体结构和器件的结构和方法

    公开(公告)号:US20030015767A1

    公开(公告)日:2003-01-23

    申请号:US09905932

    申请日:2001-07-17

    Applicant: MOTOROLA, INC.

    Abstract: Controlling and controlled components are integrated on a monolithic device. High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. By providing both compound and Group IV semiconductor materials in one integrated circuit, both control and controlled components are integrated on one device.

    Abstract translation: 控制和受控组件集成在单片设备上。 通过形成用于生长单晶层的柔性衬底,可以将单晶材料的高质量外延层生长在覆盖单晶衬底(例如大硅晶片)上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外,顺应性衬底的形成可以包括利用表面活性剂增强的外延,将单晶硅外延生长到单晶氧化物上,以及Zintl相材料的外延生长。 通过在一个集成电路中提供化合物和第IV族半导体材料,控制和受控部件都集成在一个器件上。

Patent Agency Ranking