公开(公告)号：US20030022430A1

公开(公告)日：2003-01-30

申请号：US09910753

申请日：2001-07-24

Applicant: MOTOROLA, INC.

Inventor： Rudy M. Emrick ,  Bruce Allen Bosco ,  John E. Holmes ,  Steven James Franson ,  Stephen Kent Rockwell

IPC: H01L031/0328 ,  H01L021/336 ,  H01L029/76 ,  H01L031/0336 ,  H01L031/072 ,  H01L031/109 ,  H01L021/8249 ,  H01L029/94 ,  H01L031/119 ,  H01L031/113 ,  H01L031/062

CPC classification number: H01L29/66848 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01S5/021 ,  H01S5/0261 ,  H01S2301/173

Abstract: A semiconductor structure includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material. A composite transistor includes a first transistor having first active regions formed in the monocrystalline silicon substrate, a second transistor having second active regions formed in the monocrystalline compound semiconductor material, and a mode control terminal for controlling the first transistor and the second transistor.

Abstract translation: 半导体结构包括单晶硅衬底，覆盖单晶硅衬底的非晶氧化物材料，覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料，以及覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料。 复合晶体管包括具有形成在单晶硅衬底中的第一有源区的第一晶体管，形成在单晶化合物半导体材料中的第二有源区的第二晶体管，以及用于控制第一晶体管和第二晶体管的模式控制端。

公开(公告)号：US20030020121A1

公开(公告)日：2003-01-30

申请号：US09911464

申请日：2001-07-25

Applicant: MOTOROLA, INC.

Inventor： Stephen Kent Rockwell ,  John E. Holmes ,  Nestor Javier Escalera ,  Steven James Franson

IPC: H01L029/76 ,  H01L029/94 ,  H01L021/8249 ,  H01L021/8222

CPC classification number: H01L27/0605 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8258

Abstract: A semiconductor structure for a high frequency monolithic switch matrix includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and a high frequency semiconductor integrated formed in and over the monocrystalline compound semiconductor material having one or more input ports and one or more output ports. The high frequency semiconductor integrated circuit also includes a high frequency switch circuit that is electrically coupled to a switch driver control circuit that is fabricated on the monocrystalline compound semiconductor material and which provides the DC signals required to control the high frequency circuit.

Abstract translation: 用于高频单片开关矩阵的半导体结构包括单晶硅衬底，覆盖单晶硅衬底的无定形氧化物材料，覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料，覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料，以及 集成形成在具有一个或多个输入端口和一个或多个输出端口的单晶化合物半导体材料中和之上的高频半导体。 高频半导体集成电路还包括高频开关电路，其电耦合到制造在单晶化合物半导体材料上的开关驱动器控制电路，并提供控制高频电路所需的DC信号。

公开(公告)号：US20030020069A1

公开(公告)日：2003-01-30

申请号：US09911459

申请日：2001-07-25

Applicant: MOTOROLA, INC.

Inventor： John E. Holmes ,  Bruce Allen Bosco ,  Rudy M. Emrick ,  Steven James Franson ,  Nestor Javier Escalera ,  Stephen Kent Rockwell

IPC: H01L031/0256 ,  H01L029/47

CPC classification number: H01L21/8258 ,  H01L21/02197 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/8221 ,  H01L23/522 ,  H01L23/66 ,  H01L27/0605 ,  H01L27/0688 ,  H01L2223/6627 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/80001

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. A variety of transmission media are disclosed which capitalize on the materials and devices disclosed herein.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。 公开了利用本文公开的材料和装置的各种传输介质。

公开(公告)号：US20030020107A1

公开(公告)日：2003-01-30

申请号：US09911543

申请日：2001-07-25

Applicant: MOTOROLA, INC.

Inventor： Bruce Allen Bosco ,  Nestor Javier Escalera ,  Rudy M. Emrick ,  John E. Holmes ,  Steven James Franson

IPC: H01L027/108 ,  H01L029/76 ,  H01L029/94 ,  H01L031/119

CPC classification number: H01L29/66181 ,  H01L21/02197 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/31691 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/051 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Various semiconductor device structures that include one or more capacitors can be formed using a semiconductor structure having a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material; and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and/or other types of material such as metals and non-metals.

Abstract translation: 可以使用具有单晶硅衬底，覆盖在单晶硅衬底上的无定形氧化物材料，覆盖无定形氧化物材料的单晶钙钛矿氧化物材料的半导体结构来形成包括一个或多个电容器的各种半导体器件结构; 以及覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料和/或其它类型的材料如金属和非金属。

公开(公告)号：US20030020070A1

公开(公告)日：2003-01-30

申请号：US09911478

申请日：2001-07-25

Applicant: MOTOROLA, INC.

Inventor： Stephen Kent Rockwell ,  Steven James Franson ,  John E. Holmes

IPC: H01L031/0256

CPC classification number: H01L21/02488 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02505 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/7605 ,  H01L21/762 ,  H01L21/8258 ,  H01L27/0605

Abstract: A semiconductor structure for isolating high frequency circuitry includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, a plurality of high frequency circuits formed in and over the monocrystalline compound semiconductor material, and at least one embedded isolation wall lying within the compound semiconductor material to isolate the high frequency circuits.

Abstract translation: 用于隔离高频电路的半导体结构包括单晶硅衬底，覆盖单晶硅衬底的无定形氧化物材料，覆盖非晶氧化物材料的单晶钙钛矿氧化物材料，覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料， 形成在单晶化合物半导体材料中和之上的高频电路，以及位于化合物半导体材料内的隔离高频电路的至少一个嵌入式隔离壁。

公开(公告)号：US20030015756A1

公开(公告)日：2003-01-23

申请号：US09909939

申请日：2001-07-23

Applicant: MOTOROLA, INC.

Inventor： Bryan Keith Farber ,  Steven James Franson ,  John E. Holmes ,  Rudy M. Emrick

IPC: H01L029/06 ,  H01L029/76 ,  H01L029/94 ,  H01L031/062 ,  H01L031/113 ,  H01L031/119

CPC classification number: H01L21/8258 ,  H01L21/02197 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/8221 ,  H01L27/0605 ,  H01L27/0688 ,  H01L2924/00011 ,  H01L2224/80001

Abstract: A semiconductor structure for integrated control of an active subcircuit includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, the active subcircuit in the monocrystalline compound semiconductor material, and a bias subcircuit in the monocrystalline silicon substrate and electrically coupled to the active subcircuit to bias the active subcircuit.

Abstract translation: 用于集成控制有源分支电路的半导体结构包括单晶硅衬底，覆盖单晶硅衬底的无定形氧化物材料，覆盖非晶氧化物材料的单晶钙钛矿氧化物材料，覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料， 单晶化合物半导体材料中的有源子电路，以及单晶硅衬底中的偏置子电路，并且电耦合到有源子电路以偏置有源子电路。

公开(公告)号：US20030013319A1

公开(公告)日：2003-01-16

申请号：US09901110

申请日：2001-07-10

Applicant: MOTOROLA, INC.

Inventor： John E. Holmes ,  Kurt W. Eisenbeiser ,  Rudy M. Emrick ,  Steven James Franson ,  Stephen Kent Rockwell

IPC: H01L021/31 ,  H01L021/469 ,  H01L021/20 ,  H01L021/36

CPC classification number: H01L29/66318 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8221 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0688 ,  H01L27/15 ,  H01L29/267 ,  H01L29/66462 ,  H01L2924/00011 ,  H01L2224/80001

Abstract: A semiconductor structure with selective doping includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, at least one monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and a transistor in the at least one monocrystalline compound semiconductor material and including active regions having different conductivity levels under substantially identical bias conditions.

Abstract translation: 具有选择性掺杂的半导体结构包括单晶硅衬底，覆盖单晶硅衬底的非晶氧化物材料，覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料，覆盖单晶钙钛矿氧化物材料的至少一种单晶化合物半导体材料，以及晶体管 在至少一种单晶化合物半导体材料中，并且在基本上相同的偏压条件下包括具有不同导电率的有源区。

公开(公告)号：US20030006470A1

公开(公告)日：2003-01-09

申请号：US09897968

申请日：2001-07-05

Applicant: MOTOROLA, INC.

Inventor： Steven James Franson ,  Daniel S. Marshall ,  Paige M. Holm ,  John E. Holmes ,  Bruce Allen Bosco ,  Rudy M. Emrick

IPC: H01L031/058

CPC classification number: H01L31/101 ,  H01L21/8258 ,  H01L23/38 ,  H01L27/0605 ,  H01L27/0688 ,  H01L27/15 ,  H01L27/16 ,  H01L31/1852 ,  H01L2924/0002 ,  H01S5/021 ,  H01S5/0261 ,  H01S5/183 ,  Y02E10/544 ,  H01L2924/00

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. A thermo-electric device is integrated into the semiconductor structure.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。 半导体结构中集成有热电装置。

公开(公告)号：US20030017683A1

公开(公告)日：2003-01-23

申请号：US09906783

申请日：2001-07-18

Applicant: MOTOROLA, INC.

Inventor： Rudy M. Emrick ,  Stephen Kent Rockwell ,  John E. Holmes

IPC: H01L021/20

CPC classification number: H01L29/66318 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L29/66462 ,  H01L29/7371 ,  H01L29/7783

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Once such a structure is built, a high electron mobility transistor (HEMT) or a heterojunction bipolar transistor (HBT) can be constructed on the structure. A HEMT or HBT of the above structure can then be used in a switch or in an amplifier.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 一旦构建了这种结构，就可以在该结构上构建高电子迁移率晶体管（HEMT）或异质结双极晶体管（HBT）。 因此，上述结构的HEMT或HBT可用于开关或放大器中。

公开(公告)号：US20030015768A1

公开(公告)日：2003-01-23

申请号：US09909936

申请日：2001-07-23

Applicant: MOTOROLA, INC.

Inventor： Bruce Allen Bosco ,  Steven James Franson ,  John E. Holmes ,  Nestor J. Escalera ,  Rudy M. Emrick ,  Stephen K. Rockwell

IPC: H01L027/15 ,  H01L031/12 ,  H01L033/00 ,  H01L029/00 ,  H01L031/0328

CPC classification number: G02B6/122 ,  G02B6/12004 ,  G02B6/131 ,  G02B6/4295 ,  G02B6/43 ,  G02B2006/12104 ,  G02B2006/12107 ,  G02B2006/12109 ,  G02B2006/12135 ,  G02B2006/12145 ,  G02B2006/12164 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8221 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0688 ,  H01L27/15 ,  H01L2924/00011 ,  H01S5/0071 ,  H01S5/02248 ,  H01L2224/80001

Abstract: Microelectromechanical (MEMS) devices are integrated with high frequency devices on a monolithic substrate or wafer. High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. MEMS devices, such as a switch, a variable capacitance device or a temperature control structure, are formed in the base monocrystalline substrate. High frequency devices, such as transistors or diodes, are formed in the overlaying layer of monocrystalline materials.

Abstract translation: 微机电（MEMS）器件与单片衬底或晶片上的高频器件集成。 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 在基底单晶衬底中形成诸如开关，可变电容器件或温度控制结构的MEMS器件。 在单晶材料的覆盖层中形成高频器件，例如晶体管或二极管。