专利检索 ap:("Mario Ghezzo" OR "Tat-Sing P. Chow" OR "James W. Kretchmer" OR "Richard J. Saia" OR "William A. Hennessy") AND inv:"Tat-Sing P. Chow" 第 2 页

11.

发明授权
Minimal mask process for fabricating a lateral insulated gate semiconductor device 失效
标题翻译：用于制造横向绝缘栅极半导体器件的最小掩模工艺

公开(公告)号：US4717679A

公开(公告)日：1988-01-05

申请号：US935470

申请日：1986-11-26

申请人： Bantval J. Baliga , Tat-Sing P. Chow

发明人： Bantval J. Baliga , Tat-Sing P. Chow

IPC分类号： H01L21/033 , H01L21/331 , H01L29/739 , H01L21/38 , H01L21/425

CPC分类号： H01L29/66325 , H01L21/033 , H01L29/7393

摘要： An eight mask process for forming a lateral insulated gate semiconductor device is disclosed. The gate structure can be used as a mask to align the third and fifth regions of the device and a third protective layer aligns the fourth and sixth regions of the device.

摘要翻译： 公开了一种用于形成横向绝缘栅半导体器件的八掩模工艺。栅极结构可以用作掩模以对准器件的第三和第五区域，并且第三保护层对准器件的第四和第六区域。