公开(公告)号：US09378805B2

公开(公告)日：2016-06-28

申请号：US13663939

申请日：2012-10-30

Applicant: Medtronic, Inc.

Inventor： Kevin K. Walsh ,  Brandon P. Scott ,  Larry E. Tyler

IPC: G11C11/417

CPC classification number: G11C11/417

Abstract: Random access memory having a plurality of memory cells, each of the plurality of memory cells having a memory element and a first electrical characteristic being variable based, at least in part, on temperature and a bias circuit operatively coupled to at least one of the plurality of memory cells, the bias circuit being configured to generate a bias voltage for the at least one of the plurality of memory cells. The bias circuit has a second electrical characteristic being variable based, at least in part, on temperature. The first electrical characteristic is approximately proportional to the second electrical characteristic over a predetermined range of temperatures, the predetermined range of temperatures being greater than zero. The bias voltage on each of the plurality of memory cells is approximately proportional with variations in the first electrical characteristic over the predetermined range of temperatures.

Abstract translation: 具有多个存储器单元的随机存取存储器，所述多个存储器单元中的每一个具有存储元件和第一电特性，所述第一电特性至少部分地基于温度和偏置电路而变化，所述偏置电路可操作地耦合到所述多个存储器单元中的至少一个 所述偏置电路被配置为产生所述多个存储器单元中的所述至少一个存储器单元的偏置电压。 偏置电路具有至少部分地基于温度变化的第二电特性。 在预定温度范围内，第一电特性与第二电特性近似成比例，预定温度范围大于零。 多个存储单元中的每一个上的偏置电压几乎与预定温度范围内的第一电特性的变化成比例。

公开(公告)号：US08654574B2

公开(公告)日：2014-02-18

申请号：US13791827

申请日：2013-03-08

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics SA ,  Medtronic, Inc.

Inventor： Kevin K. Walsh ,  Paul F. Gerrish ,  Larry E. Tyler ,  Mark A. Lysinger ,  David C. McClure ,  François Jacquet

IPC: G11C11/00

CPC classification number: G11C5/14 ,  G11C5/147 ,  G11C11/417

Abstract: An SRAM having two capacitors connected in series between respective bit storage nodes of each memory cell. The two inverters of the memory cell are powered by a positive voltage and a low voltage. The two capacitors are connected to each other at a common node. A leakage current generator is coupled to the common node. The leakage current generator supplies to the common node a leakage current to maintain a voltage which is approximately halfway between the voltages of the high and low SRAM supplies.

Abstract translation: 具有串联连接在每个存储单元的相应位存储节点之间的两个电容器的SRAM。 存储单元的两个反相器由正电压和低电压供电。 两个电容器在公共节点处彼此连接。 泄漏电流发生器耦合到公共节点。 泄漏电流发生器向公共节点提供泄漏电流，以保持大约在高和低SRAM电源的电压之间的一半的电压。

公开(公告)号：US20130170287A1

公开(公告)日：2013-07-04

申请号：US13663939

申请日：2012-10-30

Applicant: MEDTRONIC, INC.

Inventor： Kevin K. Walsh ,  Brandon P. Scott ,  Larry E. Tyler

IPC: G11C11/00

CPC classification number: G11C11/417

Abstract: Random access memory having a plurality of memory cells, each of the plurality of memory cells having a memory element and a first electrical characteristic being variable based, at least in part, on temperature and a bias circuit operatively coupled to at least one of the plurality of memory cells, the bias circuit being configured to generate a bias voltage for the at least one of the plurality of memory cells. The bias circuit has a second electrical characteristic being variable based, at least in part, on temperature. The first electrical characteristic is approximately proportional to the second electrical characteristic over a predetermined range of temperatures, the predetermined range of temperatures being greater than zero. The bias voltage on each of the plurality of memory cells is approximately proportional with variations in the first electrical characteristic over the predetermined range of temperatures.

Abstract translation: 具有多个存储器单元的随机存取存储器，所述多个存储器单元中的每一个具有存储元件和第一电特性，所述第一电特性至少部分地基于温度和偏置电路而变化，所述偏置电路可操作地耦合到所述多个存储器单元中的至少一个 所述偏置电路被配置为产生所述多个存储器单元中的所述至少一个存储器单元的偏置电压。 偏置电路具有至少部分地基于温度变化的第二电特性。 在预定温度范围内，第一电特性与第二电特性近似成比例，预定温度范围大于零。 多个存储单元中的每一个上的偏置电压几乎与预定温度范围内的第一电特性的变化成比例。