公开(公告)号：US20130297974A1

公开(公告)日：2013-11-07

申请号：US13888367

申请日：2013-05-07

Applicant: MICROCHIP TECHNOLOGY INCORPORATED

Inventor： Justin Milks ,  Thomas Edward Perme ,  Sundar Balasubramanian ,  Kushala Javagal

IPC: G06F11/26

CPC classification number: G06F11/26 ,  G06F11/3636 ,  G06F11/3656

Abstract: A processor device with debug capabilities has a central processing unit, debug circuitry including a trace module, a system clock module for providing internal clock signals, and a reset detection unit which during a debug mode prevents the system clock module from receiving a reset signal.

Abstract translation: 具有调试功能的处理器设备具有中央处理单元，包括跟踪模块的调试电路，用于提供内部时钟信号的系统时钟模块以及在调试模式期间防止系统时钟模块接收复位信号的复位检测单元。