公开(公告)号：US12142245B2

公开(公告)日：2024-11-12

申请号：US17945082

申请日：2022-09-14

Applicant: NOVATEK Microelectronics Corp.

Inventor： Che-Wei Yeh ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Yong-Ren Fang ,  Yi-Chuan Liu ,  Yi-Yang Tsai ,  Po-Hsiang Fang

IPC: G11C19/28 ,  G09G3/20 ,  G09G5/12

Abstract: A control system includes a plurality of driving circuits coupled in series, which include a first driving circuit and a second driving circuit. The first driving circuit includes a first receiver, a first transmitter and a first flag signal selector. The first transmitter is coupled to the first receiver, and the first flag signal selector is coupled between the first receiver and the first transmitter. The second driving circuit, coupled to the first driving circuit, includes a second receiver, a second transmitter and a second flag signal selector. The second transmitter is coupled to the second receiver, and the second flag signal selector is coupled between the second receiver and the second transmitter.

公开(公告)号：US11527195B2

公开(公告)日：2022-12-13

申请号：US17238179

申请日：2021-04-22

Applicant: NOVATEK Microelectronics Corp.

Inventor： Che-Wei Yeh ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Yong-Ren Fang ,  Yi-Chuan Liu

IPC: G09G3/04 ,  G09G3/32

Abstract: A display control system includes a plurality of driver circuits connected in series. A driver circuit among the plurality of driver circuits includes a receiver, a duty cycle correction circuit and a transmitter. The receiver is configured to receive a first signal from a previous driver circuit among the plurality of driver circuits. The duty cycle correction circuit, coupled to the receiver, is configured to adjust a duty cycle of the first signal to generate a second signal. The transmitter, coupled to the duty cycle correction circuit, is configured to transmit the second signal to a next driver circuit among the plurality of driver circuits.

公开(公告)号：US20220254305A1

公开(公告)日：2022-08-11

申请号：US17721337

申请日：2022-04-14

Applicant: Novatek Microelectronics Corp.

Inventor： Che-Wei Yeh ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Yong-Ren Fang ,  Yi-Chuan Liu

IPC: G09G3/32

Abstract: A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N−1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to the (N−1)th data signal; and a first transmitter outputting the Nth data signal according to the recovery clock signal and the recovery data signal.

公开(公告)号：US11341904B2

公开(公告)日：2022-05-24

申请号：US17138772

申请日：2020-12-30

Applicant: Novatek Microelectronics Corp.

Inventor： Che-Wei Yeh ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Yong-Ren Fang ,  Yi-Chuan Liu

IPC: G09G3/32

Abstract: A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N−1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to the (N−1)th data signal; and a first transmitter outputting the Nth data signal according to the recovery clock signal and the recovery data signal.

公开(公告)号：US20210118359A1

公开(公告)日：2021-04-22

申请号：US17138772

申请日：2020-12-30

Applicant: Novatek Microelectronics Corp.

Inventor： Che-Wei Yeh ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Yong-Ren Fang ,  Yi-Chuan Liu

IPC: G09G3/32

Abstract: A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N−1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to the (N−1)th data signal; and a first transmitter outputting the Nth data signal according to the recovery clock signal and the recovery data signal.

公开(公告)号：US20210049952A1

公开(公告)日：2021-02-18

申请号：US16841686

申请日：2020-04-07

Applicant: Novatek Microelectronics Corp.

Inventor： Che-Wei Yeh ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Yong-Ren Fang ,  Yi-Chuan Liu

IPC: G09G3/32

Abstract: A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original display data signal and outputs a first display data signal, the Nth stage LED driver receives a (N−1)th display data signal and outputs a Nth display data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to a first phase difference between the (N−1)th display data signal and the recovery clock signal; and a first transmitter outputting the Nth display data signal according to the recovery clock signal and the recovery data signal.

公开(公告)号：US10725486B2

公开(公告)日：2020-07-28

申请号：US16052654

申请日：2018-08-02

Applicant: Novatek Microelectronics Corp.

Inventor： Yong-Ren Fang ,  Shen-Iuan Liu ,  Ju-Lin Huang ,  Tzu-Chien Tzeng ,  Keko-Chun Liang ,  Yu-Hsiang Wang ,  Che-Wei Yeh

IPC: G05F1/46 ,  H03K5/24 ,  G01R19/165

Abstract: A reference voltage generator includes a detecting voltage provider, a comparator, and a core circuit. The detecting voltage provider provides a detecting voltage with a first voltage level corresponding to a voltage coefficient. The comparator compares the first voltage level of the detecting voltage with a plurality of sampled amplitudes of an input signal to respectively generate a plurality of comparison results. The core circuit is used to: collect a plurality of first comparison results associated with a current received bit of a preset value from the comparison results; take the voltage coefficient as a first boundary voltage coefficient in response to the first comparison results satisfying a first condition; take the voltage coefficient as a second boundary voltage coefficient in response to the first comparison results satisfying a second condition. The reference circuit generates a reference voltage according to the first and second boundary voltage coefficients.