公开(公告)号：US11489532B2

公开(公告)日：2022-11-01

申请号：US17241578

申请日：2021-04-27

Applicant: NXP B.V.

Inventor： Mathieu Périn ,  Stefano Dal Toso

IPC: H03L7/099 ,  H03L7/097 ,  H03L7/093

Abstract: An analog PLL comprising: a VCO configured to provide a PLL output signal; a phase detector (PD) configured to receive a feedback signal from the VCO and a reference signal and wherein the PD provides a PD signal to a low pass filter (LPF), the LPF configured to filter of the PD signal and provide the filtered signal as a tuning voltage for the VCO; and a tracking loop configured to receive the tuning voltage and comprising at least a tracking loop comparator configured to provide a comparator output voltage based on a difference between the tuning voltage and a target voltage, wherein an output of the tracking loop provides a tracking voltage based on the comparator output voltage and wherein the frequency of the PLL output voltage is based on the tuning voltage and the tracking voltage.

公开(公告)号：US20220263512A1

公开(公告)日：2022-08-18

申请号：US17241578

申请日：2021-04-27

Applicant: NXP B.V.

Inventor： Mathieu Périn ,  Stefano Dal Toso

IPC: H03L7/099 ,  H03L7/093 ,  H03L7/097

Abstract: An analog PLL comprising: a VCO configured to provide a PLL output signal; a phase detector (PD) configured to receive a feedback signal from the VCO and a reference signal and wherein the PD provides a PD signal to a low pass filter (LPF), the LPF configured to filter of the PD signal and provide the filtered signal as a tuning voltage for the VCO; and a tracking loop configured to receive the tuning voltage and comprising at least a tracking loop comparator configured to provide a comparator output voltage based on a difference between the tuning voltage and a target voltage, wherein an output of the tracking loop provides a tracking voltage based on the comparator output voltage and wherein the frequency of the PLL output voltage is based on the tuning voltage and the tracking voltage.