公开(公告)号：US4600917A

公开(公告)日：1986-07-15

申请号：US547254

申请日：1983-10-31

申请人： Nagataka Seki ,  Shunichi Koike ,  Yukio Watanabe

发明人： Nagataka Seki ,  Shunichi Koike ,  Yukio Watanabe

IPC分类号： H02H7/12 ,  H02M1/06 ,  H02M7/515 ,  H03K17/0812 ,  H03K17/10 ,  H03K17/73 ,  H03K17/732 ,  G08B21/00

CPC分类号： H03K17/08124 ,  H02M1/06 ,  H03K17/105 ,  H03K17/732

摘要： A gate-turn-off thyristor failure detecting circuit includes a detector which detects an off-gate signal for a gate-turn-off thyristor and a current level detector which compares the signal with a predetermined value and produces an output signal indicative of the failure of the gate-turn-off thyristor.

摘要翻译： 栅极截止晶闸管故障检测电路包括检测门极关断晶闸管的栅极外信号的检测器和将该信号与预定值进行比较并产生指示故障的输出信号的电流电平检测器 的闸极关断晶闸管。

公开(公告)号：US4464585A

公开(公告)日：1984-08-07

申请号：US525262

申请日：1983-08-22

申请人： Nagataka Seki

发明人： Nagataka Seki

IPC分类号： H03K17/73 ,  H03K17/64 ,  H03K17/723 ,  H03K17/72

CPC分类号： H03K17/64 ,  H03K17/723

摘要： A gate circuit of a gate turn-off thyristor has first and second circuit means. The first circuit means consists of a diode, a pulse transformer with a voltage dividing point in the primary section, and a switching element. The transformer provides a pulse current of a large rising rate between the cathode and gate of the thyristor when the switching element is closed and also provides a pulse current of a smaller falling rate between the cathode and gate when the switching element is open. The second circuit means consists of at least a single capacitor, which is connected between the voltage dividing point of the transformer and a d.c. power supply feeding an electrical power to the two circuit means so as to produce a higher voltage than that of the power supply at one end of the primary section, which is blocked by the diode from the power supply, when the switching element is open, and so as to discharge down to a lower voltage than that of the power supply at one end of the primary section when the switching element is closed.

摘要翻译： 栅极截止晶闸管的栅极电路具有第一和第二电路装置。 第一电路装置由二极管，初级部分中具有分压点的脉冲变压器和开关元件组成。 当开关元件闭合时，变压器在晶闸管的阴极和栅极之间提供大的上升速率的脉冲电流，并且当开关元件断开时，还提供阴极和栅极之间的较小下降速率的脉冲电流。 第二电路装置由至少一个电容器组成，其连接在变压器的分压点和直流电压之间。 电源向两个电路装置馈送电力，以便当开关元件断开时，产生比主电源一端的电源的电压更高的电压，该电源被二极管从电源阻挡， 并且当开关元件闭合时，放电到比初级部分的一端处的电源的电压更低的电压。

公开(公告)号：US4212054A

公开(公告)日：1980-07-08

申请号：US973561

申请日：1978-12-27

申请人： Nagataka Seki

发明人： Nagataka Seki

IPC分类号： H02M5/45 ,  H02M7/12 ,  H02M1/18

CPC分类号： H02M5/4505 ,  H02M7/125

摘要： A DC power source is provided with a rectifier circuit connected to an AC power source and a smoothing circuit, which is comprised of a DC reactor and a parallel capacitor, connected to the output terminal of the rectifier. A load is connected to the parallel capacitor. A diode is connected in a closed circuit including the parallel capacitor and the load, with such a polarity as to check discharging current discharged from the parallel capacitor. The diode forms the closed circuit, together with an auxiliary power source for applying through a reactor to the diode a voltage to make the diode conductive in forward direction. In short-circuiting accident of the load, a conducting circuit established between the auxiliary power source and the diode is shut off to block an excessive current flowing through the diode into a short-circuiting path between the parallel capacitor and the load.

摘要翻译： 直流电源设置有连接到AC电源的整流电路和连接到整流器的输出端的DC电抗器和并联电容器的平滑电路。 负载连接到并联电容器。 二极管连接在包括并联电容器和负载的闭合电路中，具有检查从并联电容器放电的放电电流的极性。 二极管与用于通过电抗器向二极管施加电压以使二极管向前导通的辅助电源形成闭合电路。 在负载短路事故中，在辅助电源和二极管之间建立的导通电路被切断以阻止流过二极管的过大电流进入并联电容器和负载之间的短路。

公开(公告)号：US5550730A

公开(公告)日：1996-08-27

申请号：US402334

申请日：1995-03-10

申请人： Nagataka Seki

发明人： Nagataka Seki

IPC分类号： H02M1/00 ,  H02M7/48 ,  H02M7/493 ,  H02M7/5387 ,  H02M7/757 ,  H03K17/0814 ,  H02M3/24

CPC分类号： H03K17/08142 ,  H02M7/5387 ,  H02M7/7575 ,  Y02E60/60

摘要： A power converting apparatus for system interconnecting includes a self-commutated converter, DC supply or direct capacitor connected to a DC terminal of the self-commutated converter, a series reactor or transformer, connected between an AC terminal of the self-commutated converter and an AC power system. The self-commutated converter includes a plurality of semiconductor valves connected in bridge between P bus and N bus of the DC supply. The semiconductor valves respectively includes a plurality of series-connected nonlatch devices, a series snubber circuit connected in series to the plurality of series-connected nonlatch devices, and a voltage balancing resistor and a plurality parallel snubber circuits respectively which includes a clipper circuit and a series circuit. The series circuit comprises a snubber capacitor and snubber resistor.

摘要翻译： 一种用于系统互连的电力转换装置包括连接在自整流转换器的直流端子上的自整流转换器，直流电源或直流电容器，串联电抗器或变压器，连接在自整流转换器的交流端子和 交流电源系统。 自整流转换器包括在DC电源的P总线和N总线之间桥接连接的多个半导体阀。 半导体阀分别包括多个串联连接的非锁定器件，串联缓冲电路串联连接到多个串联连接的非锁存器件，以及一个电压平衡电阻器和多个并联缓冲器电路，它们分别包括一个钳位电路和一个 串联电路。 串联电路包括缓冲电容器和缓冲电阻器。

公开(公告)号：US4546423A

公开(公告)日：1985-10-08

申请号：US466541

申请日：1983-02-15

申请人： Nagataka Seki

发明人： Nagataka Seki

IPC分类号： H02H7/122 ,  H02M7/48

CPC分类号： H02H7/1225 ,  H02M7/48

摘要： A multiple inverter has an input shut-off circuit receiving a DC energy input and providing two DC outputs; two unit inverters coupled to the input shut-off circuit, each including switching elements, for respectively converting the DC outputs into two AC outputs; and a control circuit coupled to the unit inverters for detecting an accidental overcurrent due to a shoot-through of the switching elements, and turning off the unit inverters. The input shut-off circuit includes circuit elements for interrupting a current path of the DC energy input when the control circuit detects the accidental or faulty overcurrent.

摘要翻译： 多个逆变器具有接收直流能量输入并提供两个直流输出的输入切断电路; 耦合到输入切断电路的两个单元逆变器，每个包括开关元件，用于分别将DC输出转换成两个AC输出; 以及耦合到单元逆变器的控制电路，用于检测由于开关元件的直通而引起的意外过电流，并且关闭单元逆变器。 输入切断电路包括当控制电路检测到意外或故障的过电流时中断直流能量输入的电流路径的电路元件。

公开(公告)号：US4275430A

公开(公告)日：1981-06-23

申请号：US863047

申请日：1977-12-21

申请人： Nagataka Seki ,  Yukio Watanabe

发明人： Nagataka Seki ,  Yukio Watanabe

IPC分类号： H03K17/73 ,  H02H7/12 ,  H02M1/06 ,  H03K17/082 ,  H03K17/732 ,  H02H7/10

CPC分类号： H03K17/0824

摘要： A snubber circuit is connected between the anode and cathode of a gate turn-off (GTO) thyristor. To the GTO thyristor a saturable reactor is connected in series. A gate off signal is supplied to the gate of the GTO thyristor and to the saturable reactor as backward current to reset the saturable reactor.

摘要翻译： 缓冲电路连接在栅极截止（GTO）晶闸管的阳极和阴极之间。 对于GTO晶闸管，可饱和电抗器串联连接。 栅极截止信号被提供给GTO晶闸管的栅极和可饱和电抗器作为反向电流以复位可饱和电抗器。

公开(公告)号：US4203047A

公开(公告)日：1980-05-13

申请号：US888365

申请日：1978-03-20

申请人： Nagataka Seki

发明人： Nagataka Seki

IPC分类号： H02M1/06 ,  H02M1/08 ,  H03K17/0812 ,  H03K17/12 ,  H03K17/723 ,  H03K17/732 ,  H03K17/72

CPC分类号： H02M1/08 ,  H03K17/08124 ,  H03K17/125 ,  H03K17/723

摘要： A first circuit means, which serves to cause reverse flow of a first pulse current of a large rate of rising and a narrow pulse width from cathode to gate of a gate turn-off thyristor in synchronism with the instant when turning off this thyristor, and a second circuit means, which serves to caus reverse flow of a second pulse current of a smaller rate of rising and a wider pulse width than the aforesaid first pulse current in superimposition thereupon from cathode to gate in synchronism with the turn-off instant, are provided.

摘要翻译： 第一电路装置，用于与关断该晶闸管的时刻同步地引起栅极截止晶闸管的阴极到栅极的大的上升速率和窄脉冲宽度的第一脉冲电流的反向流动;以及 第二电路装置，其用于使与上述第一脉冲电流相比上升和较宽的脉冲宽度的第二脉冲电流的反向流动与阴极到栅极以与关断时刻同步的叠加方式叠加在一起。 提供。

公开(公告)号：US4171517A

公开(公告)日：1979-10-16

申请号：US762279

申请日：1977-01-25

申请人： Osamu Higa ,  Nagataka Seki

发明人： Osamu Higa ,  Nagataka Seki

IPC分类号： H02M7/48 ,  H02M7/493 ,  H02M7/505 ,  H03K5/15 ,  H03K17/00 ,  H03K5/20

CPC分类号： H02M7/493 ,  H02M7/505 ,  H03K17/00 ,  H03K5/15093

摘要： In controlled apparatus in which the output pulses of a common reference oscillator are the reference signals of a plurality of inverters, a synchronizing signal generated once in each cycle is added to the output pulses of the common reference oscillator. A respective control apparatus provided for each inverter detects the synchronizing signal from these output pulses to which the synchronizing signal has been added, and by this means phase matching of the outputs of the inverters is effected.