公开(公告)号：US10454387B2

公开(公告)日：2019-10-22

申请号：US15553574

申请日：2016-02-12

Applicant: Otis Elevator Company

Inventor： Ismail Agirman ,  HanJong Kim

IPC: H02P27/06 ,  H02M7/493 ,  H02M1/00

Abstract: A power system including a first drive including a first drive output, a second drive including a second drive output, wherein the first drive output is larger than the first drive output, at least one inductor operably coupled to the first drive and the second drive, and a load operably coupled to the system output.

公开(公告)号：US20170369276A1

公开(公告)日：2017-12-28

申请号：US15537037

申请日：2015-12-09

Applicant: Otis Elevator Company

Inventor： Ismail Agirman ,  Jeffrey M. Izard ,  HanJong Kim

IPC: B66B1/30 ,  H02M7/487 ,  H02M7/49 ,  H02M5/458 ,  H02M1/12 ,  H02M1/00 ,  H02P4/00 ,  H02P25/22 ,  H02P27/14

CPC classification number: B66B1/308 ,  H02M1/12 ,  H02M5/4585 ,  H02M7/487 ,  H02M7/49 ,  H02M2001/0067 ,  H02P4/00 ,  H02P25/22 ,  H02P27/14

Abstract: A conveyance system includes a machine having a motor; a source of AC power; a drive system coupled to the source of AC power, the drive system to provide multi-phase drive signals to the motor, the drive system including: a first drive having a first converter and a first inverter, the first convertor including a first positive DC bus and a first negative DC bus; a second drive having a second converter and a second inverter, the second convertor including a second positive DC bus and a second negative DC bus; wherein the first positive DC bus and the second DC positive bus are electrically connected and the first negative DC bus and the second negative DC bus are electrically connected.

公开(公告)号：US20170288574A1

公开(公告)日：2017-10-05

申请号：US15507642

申请日：2015-07-09

Applicant: Otis Elevator Company

Inventor： Ismail Agirman ,  HanJong Kim

IPC: H02M7/487 ,  H02M7/5387 ,  H02M1/32

CPC classification number: H02M7/487 ,  H02M1/32 ,  H02M7/53871 ,  H02P27/06

Abstract: The present disclosure relates generally to a neutral point balancing scheme for power converter systems. The balancing circuit includes a first side of a first electrical component operably coupled to a mid-point of the DC link capacitor bank, and a switching combination operably coupled to the second side of the first electrical component, a positive voltage, and a negative voltage rail, wherein the switching combination is configured to generate a pulse-width modulation signal at the second side of the first electrical component.