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1.
公开(公告)号:US20240348152A1
公开(公告)日:2024-10-17
申请号:US18280336
申请日:2022-12-28
发明人: Changwei QIN , Xiaoyan LI , Zhiyuan CHU , Hongliang ZHANG , Yanfeng LI
IPC分类号: H02M1/12 , H02M1/088 , H02M7/487 , H02M7/5395
CPC分类号: H02M1/123 , H02M1/088 , H02M7/487 , H02M7/5395
摘要: A common-mode voltage suppression method includes: selecting two large and two small vectors with low common-mode voltage magnitudes as basic voltage vectors; writing a volt-second balance equation according to a selected basic voltage vectors, and calculating, an introduced distribution factor of duty cycles of small vectors, initial values of distribution factors of a duty cycle of each basic voltage vector and of small vectors; designing a neutral-point voltage balance controller to obtain and utilize a corrected value of the distribution factor of the duty cycles of the small vectors and the initial values and combine with a set neutral-point voltage balance control threshold to update the duty cycle of each basic voltage vector; and inserting shoot-through states into the small vectors, designing a switching sequence, converting the sequence into a driving signal of a power switch, and controlling an operation of the quasi-Z-source simplified three-level inverter.
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公开(公告)号:US12119758B2
公开(公告)日:2024-10-15
申请号:US18350880
申请日:2023-07-12
发明人: Ilan Yoscovich
CPC分类号: H02M7/4837 , H02M7/42 , H02M7/483 , H02M1/0043 , H02M1/088 , H02M7/487
摘要: A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.
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3.
公开(公告)号:US20240333173A1
公开(公告)日:2024-10-03
申请号:US18623734
申请日:2024-04-01
申请人: Inertech IP LLC
发明人: Subrata K Mondal
CPC分类号: H02M7/487 , H02J9/061 , H02M3/04 , H02M1/0845 , H02M7/4835 , H02M7/49 , H02M7/53873 , H02M7/53875 , H02M7/53876
摘要: Control systems for a multi-level diode-clamped inverter and corresponding methods include a processor and a digital logic circuit forming a hybrid controller. The processor identifies sector and region locations based on a sampled reference voltage vector V* and angle θe*. The processor then selects predefined switching sequences and pre-calculated turn-on time values based on the identified sector and region locations. The digital logic circuit generates PWM switching signals for driving power transistors of a multi-level diode-clamped inverter based on the turn-on time values and the selected switching sequences. The control system takes care of the existing capacitor voltage balancing issues of multi-level diode-clamped inverters while supplying both active and reactive power to an IT load. Using the control system, one can generate a symmetrical PWM signal that fully covers the linear under-modulation region.
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公开(公告)号:US12107513B2
公开(公告)日:2024-10-01
申请号:US17801599
申请日:2020-03-27
发明人: Takeo Yamamoto , Shinichiro Hayashi
IPC分类号: H02M7/483 , H02M1/14 , H02M7/487 , H02M7/5387
CPC分类号: H02M7/483 , H02M1/143 , H02M7/4833 , H02M7/487 , H02M7/53873
摘要: A three-level power converter includes a direct current power supply unit including a filter capacitor connected between a high potential line and an intermediate potential line and a filter capacitor connected between the intermediate potential line and a low potential line, and a power conversion circuit that converts a three-level direct current voltage output from the high potential line, the intermediate potential line, and the low potential line into a three-phase alternating current voltage. A controller generates an imbalance signal representing an imbalance between a first capacitor voltage and a second capacitor voltage on the basis of values detected by voltage sensors, and generates a modulation signal for causing the power conversion circuit to perform a two-phase modulation operation on the basis of a superimposed signal obtained by superimposing the imbalance signal on a reference signal of the three-phase alternating current voltage.
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公开(公告)号:US12095387B2
公开(公告)日:2024-09-17
申请号:US17896517
申请日:2022-08-26
发明人: Guolei Yu , Shuchao Song , Junliang Qin , Zhiqiang Xiang
CPC分类号: H02M7/4837 , H02M1/0095 , H02M3/158 , H02M7/487
摘要: A multi-level direct current converter includes a direct current conversion unit, a switching unit, a voltage management unit, and a controller. The direct current conversion unit includes a flying capacitor, a first power transistor, and a second power transistor. A first end of the first power transistor is connected to a voltage input end of the multi-level direct current converter, a second end of the first power transistor is connected to a first end of the second power transistor by using the flying capacitor, and a second end of the second power transistor is connected to a reference ground.
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6.
公开(公告)号:US20240275302A1
公开(公告)日:2024-08-15
申请号:US18565311
申请日:2021-07-16
申请人: Innomotics GmbH
发明人: Liviu Mihalache
IPC分类号: H02M7/483 , H02M1/00 , H02M7/487 , H02M7/5387 , H02P27/08
CPC分类号: H02M7/4835 , H02M1/0095 , H02M7/4837 , H02M7/487 , H02M7/53871 , H02P27/08
摘要: A multilevel converter (300, 310) includes a plurality of power cells (302, 304) receiving power from a source and supplying power to multiple output phases (U, V, W), wherein each output phase (U, V, W) includes a high voltage power cell (302) that is designed to output more than three voltage levels.
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公开(公告)号:US20240204690A1
公开(公告)日:2024-06-20
申请号:US18171929
申请日:2023-02-21
发明人: Palash Mairal , Rajkumar Sengodan
IPC分类号: H02M7/5387 , H02M7/487 , H02P21/22 , H02P27/08
CPC分类号: H02M7/53871 , H02M7/487 , H02P21/22 , H02P27/08
摘要: An inverter system includes an inverter having a plurality of switching elements arranged with at least three levels, where the inverter is configured to receive a direct current input and output an alternating current to three phases. The inverter system also includes a controller configured to determine a reference voltage angle based on a first voltage and a second voltage that are orthogonal components of a reference voltage and determine a sector of a space vector map of the reference voltage based on the reference voltage angle. The controller is also configured to determine an active time pair of vector states associated with on-off states of the switching elements to modulate between based on the sector and the reference voltage angle and output a carrier waveform for each of the three phases to control modulation of the switching elements to achieve the reference voltage for the three phases.
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公开(公告)号:US11984818B2
公开(公告)日:2024-05-14
申请号:US17681922
申请日:2022-02-28
申请人: DENSO CORPORATION
发明人: Ken Toshiyuki
摘要: In an inverter, three switching circuits each include first to fourth switching elements, first and second diodes, and a control circuit controlling potentials of gates. The control circuit causes potentials of U-, V-, and W-phase output wirings to change among high, neutral point, and low potentials. The control circuit performs an emergency operation when any of the second and third switching elements and the first and second diodes has caused a short fault. In the emergency operation, a potential of a limit output wiring is caused to change between two potentials that are not inhibiting potentials, and potentials of normal output wirings are caused to change among three potentials. When the short-fault element is the second switching element or the second diode, an inhibiting potential is the low potential. When the short-fault element is the third switching element or the first diode, the inhibiting potential is the high potential.
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公开(公告)号:US20240146171A1
公开(公告)日:2024-05-02
申请号:US18490892
申请日:2023-10-20
发明人: Ilan Yoscovich , Tzachi Glovinsky , Daniel Zmood , David Avraham
CPC分类号: H02M1/0003 , H02M7/487
摘要: A power converter employing a plurality of parallel high-frequency switching legs, and a low-frequency switching leg, is disclosed. A load may be coupled between the high-frequency switching legs and the low-frequency switching leg. A number of levels of a power waveform produced by the power converter may be higher than the number of levels of the high-frequency switching legs. The low-frequency switching leg may employ switches which may have low switching frequency characteristics, low conduction losses, and may be less expensive.
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公开(公告)号:US20240079968A1
公开(公告)日:2024-03-07
申请号:US18220476
申请日:2023-07-11
IPC分类号: H02M7/487
CPC分类号: H02M7/487
摘要: A method for controlling a three phase neutral point clamped (NPC) converter independently controls switching devices of each phase to produce a reconstructed output voltage level of each phase based on a linear combination of three voltage levels of that phase. The method includes setting duty ratios of the switching devices of each phase to provide the reconstructed voltage level of each phase during a switching cycle, wherein the three voltage levels of each phase are 0,
Vdc
2
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and Vdc, where Vdc is the NPC converter input voltage. Controllers for three phase NPC converters produce drive signals for the switching devices according to the methods.
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