Phase ambiguity resolution for offset QPSK modulation systems
    11.
    发明授权
    Phase ambiguity resolution for offset QPSK modulation systems 失效
    偏移QPSK调制系统的相位模糊度分辨率

    公开(公告)号:US5025455A

    公开(公告)日:1991-06-18

    申请号:US443539

    申请日:1989-11-30

    申请人: Tien M. Nguyen

    发明人: Tien M. Nguyen

    IPC分类号: H04L27/00 H04L27/227

    摘要: A demodulator for OQPSK signals modulated with two unique words resolves eight possible cominbations of phase ambiguity which may product data error by first processing received I.sub.R and Q.sub.R data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the unique words to not only reverse the received I.sub.R and Q.sub.R data channels, but to also invert (complement) the I.sub.R and/or Q.sub.R data, or to at least complement the I.sub.R and Q.sub.R data for systems using nontransparent codes that do not have rotation direction ambiguity.

    摘要翻译: 用两个唯一字调制的OQPSK信号的解调器解决了八个可能的相位歧义,可能会产生数据误差,首先通过使用具有匹配滤波器的数字科斯塔斯回路来处理集成载波环路/码元同步器中的接收到的IR和QR数据, 八个可能的相位锁定错误,然后剩下的四个使用相位歧义解析器,其检测唯一字,不仅反转接收到的IR和QR数据信道,而且还反转(补码)IR和/或QR数据,或者 至少补充使用不具有旋转方向模糊性的非透明代码的系统的IR和QR数据。

    Datalink system architecture using OTS/COTS modem for MIMO multipath sensing networks
    12.
    发明授权
    Datalink system architecture using OTS/COTS modem for MIMO multipath sensing networks 有权
    使用OTS / COTS调制解调器进行MIMO多路径感知网络的数据链路系统架构

    公开(公告)号:US08687679B2

    公开(公告)日:2014-04-01

    申请号:US12940812

    申请日:2010-11-05

    IPC分类号: H04B1/38 H04L5/16

    摘要: An apparatus interfaces a commercial-off-the-shelf (COTS)/off-the-shelf (OTS) modem for pulsed data communication using existing sensor aperture among radar platforms. The apparatus includes a demodulator for receiving a sequence of first pulse signals, at least one first pulse signal of the sequence of first pulse signals being modulated with an input signal. The demodulator includes a pulse regeneration module for regenerating a pulse timing of the sequence of first pulse signals and a pulse demodulation module for demodulating the sequence of first pulse signals to recover the input signal in synchronization with the pulse timing of the sequence of first pulse signals.

    摘要翻译: 一种装置将商用现货(COTS)/现成(OTS)调制解调器与雷达平台之间的现有传感器孔径进行脉冲数据通信。 该装置包括用于接收第一脉冲信号序列的解调器,用输入信号调制第一脉冲信号序列的至少一个第一脉冲信号。 解调器包括用于再生第一脉冲信号序列的脉冲定时的脉冲再生模块和用于解调第一脉冲信号序列的脉冲解调模块,以与第一脉冲信号序列的脉冲定时同步地恢复输入信号 。

    Datalink System Architecture Using OTS/COTS Modem for MIMO Multipath Sensing Networks
    13.
    发明申请
    Datalink System Architecture Using OTS/COTS Modem for MIMO Multipath Sensing Networks 有权
    使用OTS / COTS调制解调器进行MIMO多径传感网络的数据链路系统架构

    公开(公告)号:US20120114026A1

    公开(公告)日:2012-05-10

    申请号:US12940812

    申请日:2010-11-05

    IPC分类号: H04L5/16 H04L27/06

    摘要: An apparatus interfaces a commercial-off-the-shelf (COTS)/off-the-shelf (OTS) modem for pulsed data communication using existing sensor aperture among radar platforms. The apparatus includes a demodulator for receiving a sequence of first pulse signals, at least one first pulse signal of the sequence of first pulse signals being modulated with an input signal. The demodulator includes a pulse regeneration module for regenerating a pulse timing of the sequence of first pulse signals and a pulse demodulation module for demodulating the sequence of first pulse signals to recover the input signal in synchronization with the pulse timing of the sequence of first pulse signals.

    摘要翻译: 一种装置将商用现货(COTS)/现成(OTS)调制解调器与雷达平台之间的现有传感器孔径进行脉冲数据通信。 该装置包括用于接收第一脉冲信号序列的解调器,用输入信号调制第一脉冲信号序列的至少一个第一脉冲信号。 解调器包括用于再生第一脉冲信号序列的脉冲定时的脉冲再生模块和用于解调第一脉冲信号序列的脉冲解调模块,以与第一脉冲信号序列的脉冲定时同步地恢复输入信号 。

    Polyphase channelization system
    14.
    再颁专利
    Polyphase channelization system 有权
    多相通道化系统

    公开(公告)号:USRE41797E1

    公开(公告)日:2010-10-05

    申请号:US12328871

    申请日:2008-12-05

    IPC分类号: H04B1/10

    CPC分类号: H04L5/06

    摘要: A polyphase channelizer converts an intermediate frequency wideband signal into a complex signal that is sampled by parallel analog-to-digital converters having a bank of samplers respectively clocked by staggered clocking signals for respective converters for feeding I and Q quadrature samples to a polyphase filter bank of finite impulse response filters driving a fast Fourier transform processor for providing channelized digital signal outputs. The parallel analog-to-digital converters can operate at lower speeds but are parallel connected for effectively operating at required higher speeds. The channelizer channelizes the wideband signal using a polyphase clock for enabling high speed sampling and converting through low speed parallel analog to digital converters.

    摘要翻译: 多相通道器将中频宽带信号转换为由具有分别由交错时钟信号时钟的采样器组的并行模数转换器采样的复信号,用于各自的转换器,用于将I和Q正交采样馈送到多相滤波器组 驱动用于提供通道化数字信号输出的快速傅里叶变换处理器的有限脉冲响应滤波器。 并行模数转换器可以以较低的速度工作,但并联连接,以便以所需的更高速度进行有效的操作。 通道化器通过多相时钟通道化宽带信号,以实现高速采样和通过低速并行模数转换器进行转换。

    METHOD, SYSTEM, AND PROGRAM PRODUCT FOR MANAGING A PROCESS AND IT INTERLOCK
    15.
    发明申请
    METHOD, SYSTEM, AND PROGRAM PRODUCT FOR MANAGING A PROCESS AND IT INTERLOCK 审中-公开
    用于管理过程和IT互操作的方法,系统和程序产品

    公开(公告)号:US20080114783A1

    公开(公告)日:2008-05-15

    申请号:US11559916

    申请日:2006-11-15

    IPC分类号: G06F17/30 G06Q10/00

    CPC分类号: G06Q10/10 G06Q10/0637

    摘要: The present invention features multiple ideas that enable building and maintaining process scorecard models for a large number of process variations; process reference scorecard models and process/IT scorecard delta models. Specifically, the present invention provides a solution for managing a process and IT interlock. Under this solution a tabular model of a process having process steps along a first axis and process variations along a second axis, with cells at the intersections of the axes is constructed. Process step details including IT details for a base process are populated into the cells of a first row of the second axis. Delta details (to-be base cases) of the process steps for each of the process variations are populated into additional rows of the second axis. Project management status indicators are enabled for each cell to denote statuses of the process steps in each cell.

    摘要翻译: 本发明具有多种想法,其能够建立和维护大量工艺变化的过程计分卡模型; 过程参考计分卡模型和流程/ IT记分卡三角洲模型。 具体地,本发明提供了一种用于管理过程和IT联锁的解决方案。 在该解决方案下,具有沿着第一轴线的工艺步骤和沿着第二轴线的工艺变化的工艺的板状模型,其中构成轴的交点处的单元。 包括基本流程的IT细节的流程步骤详细信息填充到第二个轴的第一行的单元格中。 每个流程变化的流程步骤的Delta详细信息(基准情况)将填充到第二个轴的附加行中。 为每个单元格启用项目管理状态指示符,以表示每个单元格中的处理步骤的状态。

    High power amplifier predistorter system
    16.
    发明授权
    High power amplifier predistorter system 有权
    大功率放大器预失真器系统

    公开(公告)号:US06680648B2

    公开(公告)日:2004-01-20

    申请号:US10093681

    申请日:2002-03-08

    IPC分类号: H03F126

    摘要: An adaptive predistorter system receives and predistorts an input signal so as to linearize the output signal of a nonlinear high power amplifier amplifying the predistorted input signal using closed-loop feedback of the output signal in complex form at baseband so as to adaptively change the amount of the predistortion of the input signal in the presence of high power amplifier changing characteristics.

    摘要翻译: 一个自适应预失真器系统接收并预失真输入信号,以使基带复合形式的输出信号的闭环反馈采用放大预失真输入信号的非线性高功率放大器的输出信号进行线性化,以便自适应地改变 在存在高功率放大器变化特性的情况下,输入信号的预失真。