公开(公告)号：US12249017B2

公开(公告)日：2025-03-11

申请号：US17794876

申请日：2020-02-21

Applicant: QUALCOMM Incorporated

Inventor： Yongjun Xu ,  Nan Zhang ,  Wenkai Yao ,  Long Han

IPC: G06T15/00 ,  G06F1/12 ,  G06T1/20

Abstract: Devices and methods for reducing a DPU transfer time to compensate for a delayed GPU render time. After completion of rendering a second frame that follows a first frame, a frame processor determines whether the first frame is currently transferring to a display panel or has already been transferred to the display panel. At least one clock is used with a first set of clock speeds when the first frame is determined to be currently transferring and used with a second set of clock speeds when the first frame is determined to have already been transferred, the second set of clock speeds being faster than the first set of clock speeds. After completion of the transfer of the first frame, the second frame is transferred based on the set of clock speeds.

公开(公告)号：US12056881B2

公开(公告)日：2024-08-06

申请号：US17917508

申请日：2020-04-08

Applicant: QUALCOMM Incorporated

Inventor： Nan Zhang ,  Yongjun Xu

IPC: G06T7/11 ,  G06T1/20 ,  G06T7/174 ,  G09G5/377 ,  H04N7/14

CPC classification number: G06T7/174 ,  G06T1/20 ,  G06T7/11 ,  G09G5/377 ,  G09G2340/12 ,  H04N7/144

Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating, in a display panel, a virtual mask layer around a cutout region for a front camera. The front camera may be positioned under the display panel and receive light through the cutout region. The mask layer may hide defects of the cutout region that does not have functional pixels. The disclosed techniques may improve aesthetic appearance of displays having punch-hole cameras with reduced hole sizes and increased production quality conformance rate.

公开(公告)号：US11935502B2

公开(公告)日：2024-03-19

申请号：US17758286

申请日：2020-12-30

Applicant: QUALCOMM Incorporated

Inventor： Nan Zhang ,  Long Han ,  Yongjun Xu

IPC: G09G3/36 ,  G09G5/00 ,  G09G5/18

CPC classification number: G09G5/005 ,  G09G5/18

Abstract: Aspects of the present disclosure can receive a hardware Vsync signal from a display, generate a hardware timestamp signal based on the hardware Vsync signal, determine an error for a pulse in the hardware timestamp signal, determine whether the error for the pulse is over a threshold, synchronize a software Vsync signal based on the hardware timestamp signal, wherein the pulse of the hardware timestamp signal is ignored in synchronization based on whether the error is above the threshold, and control rendering and transmission of a frame to the display based on the synchronized software Vsync signal.

公开(公告)号：US12200348B2

公开(公告)日：2025-01-14

申请号：US17768092

申请日：2020-10-16

Applicant: QUALCOMM Incorporated

Inventor： Yongjun Xu ,  Zack Qing Zhou ,  Nan Zhang

IPC: H04N23/63 ,  H04M1/02 ,  H04N5/262 ,  H04N23/53 ,  H04N23/667 ,  H04N23/81 ,  H04N23/85

Abstract: An example image capture device includes a display configured to display captured images, a camera sensor, the camera sensor being disposed to receive light through at least a portion of the display, memory configured to store captured images, and one or more processors coupled to the camera sensor, the display, and the memory. The one or more processors are configured to receive a signal from a sensor. The one or more processors are configured to determine, based at least in part on the signal, a user interface mode. The user interface mode includes a first mode having a first number of black pixels or a second mode having a second number of black pixels. The first number is greater than the second number. The one or more processors are also configured to receive image data from the camera sensor.

公开(公告)号：US20250014140A1

公开(公告)日：2025-01-09

申请号：US18712617

申请日：2021-12-17

Applicant: QUALCOMM Incorporated

Inventor： Nan Zhang ,  Bo Du ,  Yongjun Xu

IPC: G06T1/20 ,  G06T11/00

Abstract: A video processing system includes a graphics subsystem including a graphics processing unit (GPU) and a frame buffer. The GPU is configured to obtain a physical pixel layout corresponding to a display architecture of an electronic display, wherein the physical pixel layout is characterized by a non-uniform subpixel arrangement; receive image data, including a matrix of logical pixel chroma values; subsample the matrix of logical pixel chroma values according to the physical pixel layout to produce subsampled image data having a subpixel rendered format corresponding to the non-uniform subpixel arrangement; store the subsampled image data in the frame buffer; and enable transfer of the subsampled image data to a display processing unit (DPU) of the electronic display for composition of frames having the non-uniform subpixel arrangement.

公开(公告)号：US20240022702A1

公开(公告)日：2024-01-18

申请号：US18044026

申请日：2020-11-25

Applicant: QUALCOMM Incorporated

Inventor： Nan Zhang ,  Yongjun Xu

IPC: H04N13/351 ,  G06T15/00 ,  G06T5/00 ,  G06T7/10 ,  G06T7/593 ,  G06V40/16 ,  H04M1/02

CPC classification number: H04N13/351 ,  G06T15/00 ,  G06T5/002 ,  G06T7/10 ,  G06T7/593 ,  G06V40/161 ,  H04M1/0214 ,  H04N2013/0081

Abstract: Methods, systems, and apparatuses are provided to automatically adjust the position of image sensors, and generate a multi-view image based on image data captured from the image sensors. For example, an image capture device includes a housing comprising a first housing portion and a second housing portion, with a first sensor coupled to the first housing portion, and a second sensor coupled to the second housing portion. A coupling device, such as a hinge, couples the first housing portion to the second housing portion. The image capture device obtains image data from the first sensor and the second sensor, and determines an object depth based on the obtained image data. The image capture device outputs an adjusted angle based on the object depth, and obtains additional image data from the first and second sensors. The image capture device generates the multi-view image based on the additional image data.