Method and system for independent I and Q loop amplitude control for quadrature generators
    11.
    发明授权
    Method and system for independent I and Q loop amplitude control for quadrature generators 有权
    用于正交发生器的独立I和Q环路振幅控制的方法和系统

    公开(公告)号:US07634027B2

    公开(公告)日:2009-12-15

    申请号:US11618719

    申请日:2006-12-29

    IPC分类号: H04L25/06

    CPC分类号: H04L27/364 H04L27/362

    摘要: Certain aspects of a method and system for independent in-phase (I) and quadrature (Q) loop amplitude control for quadrature generators may include determining an amplitude voltage associated with an in-phase (I) component and a quadrature (Q) component of a generated signal. A DC reference voltage associated with the I component and the Q component may be determined. The determined amplitude voltage may be compared with the determined reference voltage to generate a control signal. The amplitude mismatch between the I component and the Q component may be compensated by controlling a biasing current of one or more programmable buffers associated with one or both of the I component and the Q component, based on the generated control signal.

    摘要翻译: 用于正交发生器的独立同相(I)和正交(Q)环路幅度控制的方法和系统的某些方面可以包括确定与同相(I)分量和正交(Q)分量的正交(Q)分量相关联的幅度电压 产生的信号。 可以确定与I分量和Q分量相关联的DC参考电压。 可以将确定的振幅电压与所确定的参考电压进行比较以产生控制信号。 可以通过基于所生成的控制信号控制与I分量和Q分量中的一个或两个相关联的一个或多个可编程缓冲器的偏置电流来补偿I分量和Q分量之间的幅度失配。

    Method and System for Calibrating a Plurality of Modules in a Communication System
    12.
    发明申请
    Method and System for Calibrating a Plurality of Modules in a Communication System 有权
    用于校准通信系统中多个模块的方法和系统

    公开(公告)号:US20080139143A1

    公开(公告)日:2008-06-12

    申请号:US11618721

    申请日:2006-12-29

    IPC分类号: H01Q11/12

    摘要: A method and system for calibrating a plurality of modules in a communication system is provided. The method may include selecting a plurality of modules with at least one output signal and calibrating an amplitude of each selected module to be within a specified range if the amplitude is out of the specified range via a gain control processing circuit of the selected module, wherein the plurality of modules may be calibrated in an order starting with a first module located at an input of a signal path and ending with a module located at an output of the signal path. The DC component and amplitude of the envelope of the output signal may be detected by circuitry within the selected module. Muxes may be utilized to route the DC component and amplitude of the envelope to a feedback control processing circuit.

    摘要翻译: 提供了一种用于在通信系统中校准多个模块的方法和系统。 该方法可以包括:通过所选择的模块的增益控制处理电路,如果振幅超出指定范围,则选择具有至少一个输出信号的多个模块,并将每个所选模块的振幅校准在指定范围内,其中 多个模块可以以从位于信号路径的输入端的第一模块开始并以位于信号路径的输出端的模块结束的顺序被校准。 输出信号的包络的直流分量和振幅可由所选模块内的电路检测。 可以利用复用器将DC分量和信号的幅度路由到反馈控制处理电路。

    Method and System for a Compact and Power Efficient Local Oscillator Generation Architecture
    13.
    发明申请
    Method and System for a Compact and Power Efficient Local Oscillator Generation Architecture 有权
    紧凑型和高功率本地振荡器生成架构的方法和系统

    公开(公告)号:US20080139115A1

    公开(公告)日:2008-06-12

    申请号:US11753626

    申请日:2007-05-25

    IPC分类号: H04B5/00

    摘要: Certain aspects of a method and system for a compact and power efficient local oscillator generation architecture in multi-standard systems may include selection of an input frequency range of operation at a voltage controlled oscillator (VCO) based on a particular wireless band of operation. An image rejection mixer may be enabled to mix a plurality of generated local oscillator signals. An inductive buffer may be enabled to generate an output signal by buffering the mixed plurality of generated local oscillator signals in a single backend stage. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing an RC-CR quadrature network.

    摘要翻译: 用于多标准系统中紧凑且功率有效的本地振荡器生成架构的方法和系统的某些方面可包括基于特定的无线工作频带选择在压控振荡器(VCO)处的输入频率范围。 可以使镜像抑制混频器能够混合多个生成的本地振荡器信号。 可以通过在单个后端级中缓冲混合的多个产生的本地振荡器信号来使电感缓冲器产生输出信号。 可以通过利用RC-CR正交网络来产生所产生的输出信号的同相(I)分量和正交(Q)分量。

    Method and System for Independent I and Q Loop Amplitude Control for Quadrature Generators
    14.
    发明申请
    Method and System for Independent I and Q Loop Amplitude Control for Quadrature Generators 有权
    用于正交发生器的独立I和Q环路幅度控制的方法和系统

    公开(公告)号:US20080137777A1

    公开(公告)日:2008-06-12

    申请号:US11618719

    申请日:2006-12-29

    IPC分类号: H04L25/06

    CPC分类号: H04L27/364 H04L27/362

    摘要: Certain aspects of a method and system for independent in-phase (I) and quadrature (Q) loop amplitude control for quadrature generators may include determining an amplitude voltage associated with an in-phase (I) component and a quadrature (Q) component of a generated signal. A DC reference voltage associated with the I component and the Q component may be determined. The determined amplitude voltage may be compared with the determined reference voltage to generate a control signal. The amplitude mismatch between the I component and the Q component may be compensated by controlling a biasing current of one or more programmable buffers associated with one or both of the I component and the Q component, based on the generated control signal.

    摘要翻译: 用于正交发生器的独立同相(I)和正交(Q)环路幅度控制的方法和系统的某些方面可以包括确定与同相(I)分量和正交(Q)分量的正交(Q)分量相关联的幅度电压 产生的信号。 可以确定与I分量和Q分量相关联的DC参考电压。 可以将确定的振幅电压与所确定的参考电压进行比较以产生控制信号。 可以通过基于所生成的控制信号控制与I分量和Q分量中的一个或两个相关联的一个或多个可编程缓冲器的偏置电流来补偿I分量和Q分量之间的幅度失配。

    Programmable amplitude compensation circuit
    15.
    发明授权
    Programmable amplitude compensation circuit 有权
    可编程幅度补偿电路

    公开(公告)号:US07586342B2

    公开(公告)日:2009-09-08

    申请号:US12072437

    申请日:2008-02-26

    IPC分类号: H03B1/00

    CPC分类号: H03G3/001

    摘要: According to one exemplary embodiment, an amplitude compensation circuit includes a first composite programmable buffer for receiving a first input signal with a first input amplitude. The amplitude compensation circuit further includes a second composite programmable buffer for receiving a second input signal with a second input amplitude. The amplitude compensation circuit also includes a feedback circuit coupled to respective outputs of the first and second composite programmable buffers. According to this embodiment, the feedback circuit compares a first output amplitude of the first composite programmable buffer with a reference voltage and a second output amplitude of the second composite programmable buffer with the reference voltage and provides first and second control signals for adjusting the respective gains of the first and second composite programmable buffers so as to reduce respective differences between the first and second output amplitudes and the reference voltage.

    摘要翻译: 根据一个示例性实施例,幅度补偿电路包括用于接收具有第一输入幅度的第一输入信号的第一复合可编程缓冲器。 幅度补偿电路还包括用于接收具有第二输入幅度的第二输入信号的第二复合可编程缓冲器。 振幅补偿电路还包括耦合到第一和第二复合可编程缓冲器的相应输出的反馈电路。 根据该实施例,反馈电路将第一复合可编程缓冲器的第一输出幅度与具有参考电压的第二复合可编程缓冲器的参考电压和第二输出幅度进行比较,并提供用于调整相应增益的第一和第二控制信号 的第一和第二复合可编程缓冲器,以便减小第一和第二输出幅度与参考电压之间的差异。

    Method and System for Buffering A Clock Signal
    16.
    发明申请
    Method and System for Buffering A Clock Signal 审中-公开
    缓冲时钟信号的方法和系统

    公开(公告)号:US20080136498A1

    公开(公告)日:2008-06-12

    申请号:US11618863

    申请日:2006-12-31

    IPC分类号: H03K3/01

    摘要: A method and system for buffering a clock signal is provided. The method may include self-biasing a PMOS transistor of a buffer, utilized for amplifying an in-phase/quadrature phase signal, to produce a first bias voltage at the gate of a PMOS transistor, and biasing an NMOS transistor of the buffer via a controllable current source to produce a second bias voltage at the gate of the NMOS transistor. The gain of the buffer may be controlled by varying a controllable current source coupled to a second NMOS transistor configured as a diode. Two coupling capacitors may be utilized to remove a DC component of the signal. Multiple buffers may be coupled end-to-end to increase the overall drive capability, where the channel width of the transistors within the transistors may be doubled in each successive buffer.

    摘要翻译: 提供了一种用于缓冲时钟信号的方法和系统。 该方法可以包括自偏压缓冲器的PMOS晶体管,用于放大同相/正交相位信号,以在PMOS晶体管的栅极处产生第一偏置电压,并经由一个PMOS晶体管偏置缓冲器的NMOS晶体管 可控电流源,以在NMOS晶体管的栅极处产生第二偏置电压。 可以通过改变耦合到配置为二极管的第二NMOS晶体管的可控电流源来控制缓冲器的增益。 可以使用两个耦合电容器来去除信号的DC分量。 多个缓冲器可以端对端耦合以增加总体驱动能力,其中晶体管内的晶体管的沟道宽度可以在每个连续的缓冲器中加倍。

    AMPLITUDE COMPENSATION CIRCUIT WITH PROGRAMMABLE BUFFERS
    17.
    发明申请
    AMPLITUDE COMPENSATION CIRCUIT WITH PROGRAMMABLE BUFFERS 失效
    振幅补偿电路与可编程缓存器

    公开(公告)号:US20080088347A1

    公开(公告)日:2008-04-17

    申请号:US11580601

    申请日:2006-10-12

    IPC分类号: H03B1/00

    CPC分类号: H03G3/001

    摘要: According to one exemplary embodiment, an amplitude compensation circuit includes a first composite programmable buffer for receiving a first input signal with a first input amplitude. The amplitude compensation circuit further includes a second composite programmable buffer for receiving a second input signal with a second input amplitude. The amplitude compensation circuit also includes a feedback circuit coupled to respective outputs of the first and second composite programmable buffers. According to this embodiment, the feedback circuit compares a first output amplitude of the first composite programmable buffer with a reference voltage and a second output amplitude of the second composite programmable buffer with the reference voltage and provides first and second control signals for adjusting the respective gains of the first and second composite programmable buffers so as to reduce respective differences between the first and second output amplitudes and the reference voltage.

    摘要翻译: 根据一个示例性实施例,幅度补偿电路包括用于接收具有第一输入幅度的第一输入信号的第一复合可编程缓冲器。 幅度补偿电路还包括用于接收具有第二输入幅度的第二输入信号的第二复合可编程缓冲器。 振幅补偿电路还包括耦合到第一和第二复合可编程缓冲器的相应输出的反馈电路。 根据该实施例,反馈电路将第一复合可编程缓冲器的第一输出幅度与具有参考电压的第二复合可编程缓冲器的参考电压和第二输出幅度进行比较,并提供用于调整相应增益的第一和第二控制信号 的第一和第二复合可编程缓冲器,以便减小第一和第二输出幅度与参考电压之间的差异。

    Amplitude compensation circuit with programmable buffers

    公开(公告)号:US20080157829A1

    公开(公告)日:2008-07-03

    申请号:US12072437

    申请日:2008-02-26

    IPC分类号: H03B1/00

    CPC分类号: H03G3/001

    摘要: According to one exemplary embodiment, an amplitude compensation circuit includes a first composite programmable buffer for receiving a first input signal with a first input amplitude. The amplitude compensation circuit further includes a second composite programmable buffer for receiving a second input signal with a second input amplitude. The amplitude compensation circuit also includes a feedback circuit coupled to respective outputs of the first and second composite programmable buffers. According to this embodiment, the feedback circuit compares a first output amplitude of the first composite programmable buffer with a reference voltage and a second output amplitude of the second composite programmable buffer with the reference voltage and provides first and second control signals for adjusting the respective gains of the first and second composite programmable buffers so as to reduce respective differences between the first and second output amplitudes and the reference voltage.

    Amplitude compensation circuit with programmable buffers
    19.
    发明授权
    Amplitude compensation circuit with programmable buffers 失效
    具有可编程缓冲器的幅度补偿电路

    公开(公告)号:US07358779B1

    公开(公告)日:2008-04-15

    申请号:US11580601

    申请日:2006-10-12

    IPC分类号: H03B1/00

    CPC分类号: H03G3/001

    摘要: According to one exemplary embodiment, an amplitude compensation circuit includes a first composite programmable buffer for receiving a first input signal with a first input amplitude. The amplitude compensation circuit further includes a second composite programmable buffer for receiving a second input signal with a second input amplitude. The amplitude compensation circuit also includes a feedback circuit coupled to respective outputs of the first and second composite programmable buffers. According to this embodiment, the feedback circuit compares a first output amplitude of the first composite programmable buffer with a reference voltage and a second output amplitude of the second composite programmable buffer with the reference voltage and provides first and second control signals for adjusting the respective gains of the first and second composite programmable buffers so as to reduce respective differences between the first and second output amplitudes and the reference voltage.

    摘要翻译: 根据一个示例性实施例,幅度补偿电路包括用于接收具有第一输入幅度的第一输入信号的第一复合可编程缓冲器。 幅度补偿电路还包括用于接收具有第二输入幅度的第二输入信号的第二复合可编程缓冲器。 振幅补偿电路还包括耦合到第一和第二复合可编程缓冲器的相应输出的反馈电路。 根据该实施例,反馈电路将第一复合可编程缓冲器的第一输出幅度与具有参考电压的第二复合可编程缓冲器的参考电压和第二输出幅度进行比较,并提供用于调整相应增益的第一和第二控制信号 的第一和第二复合可编程缓冲器,以便减小第一和第二输出幅度与参考电压之间的差异。

    RADIO FRONT END AND APPLICATIONS THEREOF
    20.
    发明申请
    RADIO FRONT END AND APPLICATIONS THEREOF 有权
    无线电前端及其应用

    公开(公告)号:US20120302181A1

    公开(公告)日:2012-11-29

    申请号:US13571982

    申请日:2012-08-10

    IPC分类号: H04B1/38

    CPC分类号: H04B1/0458 H04B1/18 H04B1/48

    摘要: A radio front end includes a transformer and an adjustable load. The transformer includes a first winding and a second winding, wherein the first winding is operably coupled to an antenna and the second winding coupled to at least one of a power amplifier and a low noise amplifier. The adjustable load is operably coupled to the second winding, wherein the adjustable load provides a first impedance based on a first impedance selection signal when the radio front end is in a transmit mode and provides a second impedance based on a second impedance selection signal when the radio front end is in a receive module such that impedance at the first winding is substantially similar in the transmit mode and in the receive mode.

    摘要翻译: 无线电前端包括变压器和可调负载。 变压器包括第一绕组和第二绕组,其中第一绕组可操作地耦合到天线,第二绕组耦合到功率放大器和低噪声放大器中的至少一个。 可调负载可操作地耦合到第二绕组,其中当无线电前端处于发射模式时,可调载荷提供基于第一阻抗选择信号的第一阻抗,并且当第二阻抗选择信号基于第二阻抗选择信号时,基于第二阻抗选择信号提供第二阻抗 无线电前端处于接收模块中,使得第一绕组处的阻抗在发射模式和接收模式下基本相似。