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公开(公告)号:US20180234102A1
公开(公告)日:2018-08-16
申请号:US15952588
申请日:2018-04-13
Applicant: Renesas Electronics Corporation
Inventor: Yoshihiro Funato , Yasuo Morimoto , Kazuaki Kurooka
CPC classification number: H03M1/0617 , H03M1/1023 , H03M1/1038 , H03M1/1057 , H03M1/12 , H03M1/145
Abstract: An analog to digital (AD) converter includes an AD conversion circuit, and a calibration circuit that calibrates an output value of the AD conversion circuit. The calibration circuit includes a right-shift circuit that shifts an accumulated value of values obtained by removing a deviated value from a plurality of output values of the AD conversion circuit. The calibration circuit calibrates the output value of the AD conversion circuit based on the shifted value.
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公开(公告)号:US10033397B2
公开(公告)日:2018-07-24
申请号:US14991978
申请日:2016-01-10
Applicant: Renesas Electronics Corporation
Inventor: Kazuaki Kurooka , Yoshihiro Funato
Abstract: In a semiconductor device, a sine wave signal is input to a first input part and a cosine wave signal is input to a second input part. A multiplexer alternately selects one of the sine wave signal and the cosine wave signal. An analog to digital converter converts the output signal of the multiplexer into a digital value. A switching circuit is coupled between at least one of the first and second input parts and the multiplexer. The switching circuit is configured to be able to invert the input sine wave signal or the input cosine wave signal, in order to reduce the angle detection error due to the non-linearity error of the A/D converter.
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公开(公告)号:US09960779B2
公开(公告)日:2018-05-01
申请号:US15799034
申请日:2017-10-31
Applicant: Renesas Electronics Corporation
Inventor: Yoshihiro Funato , Yasuo Morimoto , Kazuaki Kurooka
CPC classification number: H03M1/0617 , H03M1/1023 , H03M1/1038 , H03M1/1057 , H03M1/12 , H03M1/145
Abstract: An analog-to-digital (AD) convertor includes: an AD conversion circuit; and a correction circuit that corrects an output value of the AD conversion circuit based on a correction value, wherein the correction circuit generates a plurality of elemental correction values based on a plurality of output values which are converted values of a plurality of analog values by the AD conversion circuit, wherein the correction value is determined by an average value of remaining values obtained by removing a deviated value from the plurality of elemental correction values.
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公开(公告)号:US09838027B2
公开(公告)日:2017-12-05
申请号:US15615719
申请日:2017-06-06
Applicant: Renesas Electronics Corporation
Inventor: Yoshihiro Funato , Yasuo Morimoto , Kazuaki Kurooka
CPC classification number: H03M1/0617 , H03M1/1023 , H03M1/1038 , H03M1/1057 , H03M1/12 , H03M1/145
Abstract: An analog-to-digital (AD) convertor includes: a capacitance digital-to-analog (DA) convertor circuit; a comparator circuit coupled to the capacitance DA convertor circuit; and a calibration circuit that calculates a correction value for the AD convertor, wherein the capacitance DA convertor circuit includes a first capacitor, a second capacitor, n number of capacitors (n being integer equal to or larger than 3), each of the capacitors from first to n-th to be activated based on input digital data, wherein each of the first and second capacitors is designed for having a first capacitance value, wherein the n-th capacitor is designed for having twice the capacitance value of the (n−1)-th capacitor, wherein the calibration circuit calculates the correction value based on first and second results of the AD convertor, and wherein the first result is generated using the n-th capacitor and the second result is generated using the capacitors from first to (n−1)-th.
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