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公开(公告)号:US20240364288A1
公开(公告)日:2024-10-31
申请号:US18307625
申请日:2023-04-26
Applicant: Cypress Semiconductor Corporation
Inventor: Adrian Lin
CPC classification number: H03G3/30 , H03M1/12 , H03G2201/103
Abstract: Systems, methods, and devices provide sampling for data converters. Methods include receiving a voltage from a voltage source, and identifying transconductance parameters and resistance parameters associated with a data converter, the transconductance parameters identifying a transconductance of the data converter. Methods also include selecting a resistor from a plurality of dynamically selectable resistors based on the resistance parameters, generating, using a programmable gain amplifier, a current based, at least in part, on the selected resistor and the received voltage, and providing the current to the data converter.
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公开(公告)号:US20240322763A1
公开(公告)日:2024-09-26
申请号:US18678703
申请日:2024-05-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Joseph Sankman
Abstract: An amplifier includes a first stage and a second stage. The first stage includes a first output and a second output. The second stage includes an output, a first transistor and a second transistor. The first transistor includes a drain coupled to the first output of the first stage, and a source coupled to the output of the second stage. The second transistor includes a drain coupled to the second output of the first stage, and a gate coupled to the output of the second stage.
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公开(公告)号:US20240282302A1
公开(公告)日:2024-08-22
申请号:US18414474
申请日:2024-01-17
Applicant: Realtek Semiconductor Corp.
Inventor: Ying-Ying Chao
CPC classification number: G10L15/22 , G10L15/04 , G10L15/08 , G10L19/018 , G10L25/21 , G10L25/51 , H03M1/12 , G10L2015/088 , G10L2015/223
Abstract: A watermark-based audio processing method for use in the audio player including a receiver, an analog-to-digital converter, a processor, a digital-to-analog converter and a transmitter includes: the receiver receiving an audio input signal, the analog-to-digital converter converting the audio input signal into a digital input signal including a keyword, the processor detecting an energy of the digital input signal, if the energy exceeds a threshold, the processor determining whether a watermark is included in the digital input signal, if not, the processor embedding the watermark into a predefined digital audio signal to generate a digital output signal, then the digital-to-analog converter converting the digital output signal into an audio output signal, and finally, the transmitter outputting the audio output signal for playback.
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公开(公告)号:US12052524B2
公开(公告)日:2024-07-30
申请号:US18002876
申请日:2021-06-24
Applicant: Beijing RuisiZhixin Technology Co., Ltd. , Alpsentek GmbH
Inventor: Yingyun Zha , Roger Mark Bostock , Jian Deng , Yu Zou
IPC: H04N25/771 , G06F7/02 , H03M1/12 , H04N25/40 , H04N25/47 , H04N25/703 , H04N25/766 , H04N25/772 , H04N25/78 , H04N25/79
CPC classification number: H04N25/771 , G06F7/02 , H03M1/12 , H04N25/40 , H04N25/47 , H04N25/703 , H04N25/766 , H04N25/772 , H04N25/78 , H04N25/79
Abstract: A delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. A digital representation may be externally written to the digital storage circuit of the at least one pixel.
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公开(公告)号:US12038777B2
公开(公告)日:2024-07-16
申请号:US17359025
申请日:2021-06-25
Applicant: Lightmatter, Inc.
Inventor: Michael Gould , Carl Ramey , Nicholas C. Harris , Darius Bunandar
CPC classification number: G06E3/008 , H03H17/06 , H03H2017/0081 , H03M1/12
Abstract: Hybrid analog-digital processing systems are described. An example of a hybrid analog-digital processing system includes photonic accelerator configured to perform matrix-vector multiplication using light. The photonic accelerator exhibits a frequency response having a first bandwidth (e.g., less than 3 GHz). The hybrid analog-digital processing system further includes a plurality of analog-to-digital converters (ADCs) coupled to the photonic accelerator, and a plurality of digital equalizers coupled to the plurality of ADCs, wherein the digital equalizers are configured to set a frequency response of the hybrid analog-digital processing system to a second bandwidth greater than the first bandwidth.
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公开(公告)号:US20240235569A1
公开(公告)日:2024-07-11
申请号:US18614206
申请日:2024-03-22
Applicant: Analog Devices, Inc.
Inventor: Jesper Steensgaard-Madsen
CPC classification number: H03M1/12 , H03F1/42 , H03F3/005 , H03F2200/156
Abstract: Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.
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公开(公告)号:US12028033B2
公开(公告)日:2024-07-02
申请号:US17926083
申请日:2020-05-20
Applicant: Telefonaktiebolaget LM Ericsson (publ)
Inventor: Ufuk Özdemir , Peter Caputa , Kirill Kozmin
CPC classification number: H03H11/04 , H03D7/1491 , H03L7/08 , H03M1/12 , H03M1/66
Abstract: A filter circuitry (200) using an active inductor is disclosed. The filter circuitry (200) has a first terminal (In1/Out1) and a second terminal (In2/Out2). The filter circuitry (200) comprises a first transistor (M1) and a second transistor (M2). The filter circuitry (200) further comprises a first switch (S1), a second switch (S2), a first capacitor (C1), a second capacitor (C2) and a resistor (R). The first and second transistors (M1/M2) together with the resistor (R) and the first and second switches (S1/S2) are connected in a current mirror topology. The first and second capacitors (C1/C2) are connected at the first and second terminals of the filter circuitry (200) respectively. The filter circuitry (200) is configurable to either have the first terminal (In1/Out1) as input and the second terminal (In2/Out2) as output or have the first terminal (In1/Out1) as output and the second terminal (In2/Out2) as input by changing on-off states of the first and second switches. The transistors are interconnected in a current-mirror fashion. Depending on the switch position one of the transistors also acts as part of an active inductor such that the circuit functions as a low pass filter with a complex pole pair and a real pole. Depending on the switch position the LPF allows signal flow in either direction. For use in a TDD environment in combination with a passive mixer (420).
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公开(公告)号:US20240214086A1
公开(公告)日:2024-06-27
申请号:US18240175
申请日:2023-08-30
Applicant: Strong Force IoT Portfolio 2016, LLC
Inventor: Charles Howard Cella , Gerald William Duffy, JR. , Jeffrey P. McGuckin , Mehul Desai
IPC: H04B17/29 , B62D5/04 , B62D15/02 , G01M13/028 , G01M13/04 , G01M13/045 , G05B13/02 , G05B19/042 , G05B19/418 , G05B23/02 , G06F17/18 , G06F18/21 , G06F18/25 , G06N3/006 , G06N3/02 , G06N3/044 , G06N3/045 , G06N3/047 , G06N3/084 , G06N3/088 , G06N3/126 , G06N5/046 , G06N7/01 , G06N20/00 , G06Q10/04 , G06Q10/0639 , G06Q30/02 , G06Q30/06 , G06Q50/00 , G06V10/778 , G06V10/82 , G16Z99/00 , H02M1/12 , H03M1/12 , H04B17/23 , H04B17/309 , H04B17/318 , H04B17/345 , H04B17/40 , H04L1/00 , H04L1/18 , H04L1/1867 , H04L5/00 , H04L67/1097 , H04L67/12 , H04L67/306 , H04W4/38 , H04W4/70
CPC classification number: H04B17/29 , B62D15/0215 , G01M13/028 , G01M13/04 , G01M13/045 , G05B13/028 , G05B19/4183 , G05B19/4184 , G05B19/41845 , G05B19/4185 , G05B19/41865 , G05B19/41875 , G05B23/0221 , G05B23/0229 , G05B23/024 , G05B23/0264 , G05B23/0283 , G05B23/0286 , G05B23/0289 , G05B23/0291 , G05B23/0294 , G05B23/0297 , G06F18/2178 , G06N3/006 , G06N3/02 , G06N3/044 , G06N3/045 , G06N3/047 , G06N3/084 , G06N3/088 , G06N5/046 , G06N7/01 , G06N20/00 , G06Q10/04 , G06Q10/0639 , G06Q30/02 , G06Q30/0278 , G06Q30/06 , G06Q50/00 , G06V10/7784 , G06V10/82 , G16Z99/00 , H02M1/12 , H03M1/12 , H04B17/23 , H04B17/309 , H04B17/318 , H04B17/345 , H04L1/0002 , H04L1/0041 , H04L1/18 , H04L1/1874 , H04L67/1097 , H04L67/12 , H04W4/38 , H04W4/70 , B62D5/0463 , G05B19/042 , G05B23/02 , G05B23/0208 , G05B2219/32287 , G05B2219/35001 , G05B2219/37337 , G05B2219/37351 , G05B2219/37434 , G05B2219/37537 , G05B2219/40115 , G05B2219/45004 , G05B2219/45129 , G06F17/18 , G06F18/21 , G06F18/217 , G06F18/25 , G06N3/126 , H04B17/40 , H04L1/0009 , H04L5/0064 , H04L67/306 , Y02P80/10 , Y02P90/02 , Y02P90/80 , Y04S50/00 , Y04S50/12 , Y10S707/99939
Abstract: In some embodiments, a monitoring system for an industrial environment includes a data collector structured to collect data from at least one of a plurality of sensors, an expert system configured to analyze the collected data and generate a corresponding heat map, and a heat map interface to provide the heat map to an AR/VR device, wherein the heat map overlays a view of the underlying sensors, and wherein the data collector is further configured to collect user data, representative of a behavior of the user, from the AR/VR device.
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公开(公告)号:US20240187021A1
公开(公告)日:2024-06-06
申请号:US18516930
申请日:2023-11-21
Applicant: Realtek Semiconductor Corporation
Inventor: Chung-Yao CHANG , Chuan-Hu LIN
CPC classification number: H04B1/005 , H03M1/0626 , H03M1/12
Abstract: A wireless access point apparatus includes a mixer, an analog low-pass filter (ALPF), an analog-to-digital converter (ADC), a radar detector and a controller. The mixer is configured to mix a wireless signal and a carrier signal for performing frequency conversion on the wireless signal. The ALPF with a passband is configured to perform filtering on the wireless signal, so as to filter out a signal component of the wireless signal out of the passband. The ADC is configured to convert the wireless signal from an analog form to a digital form. The radar detector is configured to detector whether the wireless signal includes any radar signal. The controller is configured to adjust a carrier frequency of the carrier signal depending on a determination result of the radar detector for switching between a dynamic frequency selection (DFS) channel, a non-DFS channel and a composite channel.
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公开(公告)号:US11997570B1
公开(公告)日:2024-05-28
申请号:US17300341
申请日:2021-05-14
Applicant: Trackonomy Systems, Inc.
Inventor: Hendrik J Volkerink , Ajay Khoche
CPC classification number: H04W4/38 , H03M1/12 , G06F17/40 , H04B7/0413 , H04W56/0045 , H04W84/18
Abstract: A method is closed for context-based compression and reconstruction of data transmitted from a wireless node in an IOT system, according to some embodiments. The method includes a server receiving communications from a sender node. The communication includes truncated data comprising a sender node address, wherein the truncated data does not include an identifier of a physical premises associated with the sender node. The server accesses a lookup table comprising plurality of entries mapping sender node addresses to identifiers of physical premises. The server retrieves an identifier of a physical premises corresponding to node, according to the lookup table and appends the identifier of the physical premises to the sender address to reconstruct the full sender address.
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