公开(公告)号：US09614443B2

公开(公告)日：2017-04-04

申请号：US14808119

申请日：2015-07-24

Applicant: RF Micro Devices, Inc.

Inventor： Michael R. Kay ,  Manbir Singh Nag

IPC: G05F1/24 ,  H02M3/158

CPC classification number: H02M3/1582 ,  H02M3/07 ,  H02M3/1584 ,  H02M2001/0003 ,  H02M2001/0045 ,  H02M2001/4291 ,  H02M2003/1586 ,  H03F3/38

Abstract: A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.

公开(公告)号：US09450539B2

公开(公告)日：2016-09-20

申请号：US14163256

申请日：2014-01-24

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat ,  Michael R. Kay ,  Manbir Singh Nag

IPC: H01Q11/12 ,  H04B1/04 ,  H03F3/189 ,  H03F1/02 ,  H03F3/195 ,  H03F3/24 ,  H02M1/00

Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.

公开(公告)号：US20130328613A1

公开(公告)日：2013-12-12

申请号：US13914888

申请日：2013-06-11

Applicant: RF Micro Devices, Inc.

Inventor： Michael R. Kay ,  Manbir Singh Nag ,  Philippe Gorisse

IPC: H03K17/687

CPC classification number: H03K17/687 ,  G06F1/263 ,  Y10T307/50

Abstract: Circuitry, which includes a first switching transistor element having a first gate, a second switching transistor element having a second gate, a third switching transistor element having a third gate, and a fourth switching transistor element having a fourth gate, is disclosed. The first switching transistor element and the third switching transistor element are coupled in series between a first power source and a first downstream circuit. The second switching transistor element and the fourth switching transistor element are coupled in series between a second power source and the first downstream circuit. A voltage swing at the first gate and a voltage swing at the second gate are both about equal to a first voltage magnitude. A voltage swing at the third gate and a voltage swing at the fourth gate are both about equal to a second voltage magnitude.

Abstract translation: 公开了一种电路，其包括具有第一栅极的第一开关晶体管元件，具有第二栅极的第二开关晶体管元件，具有第三栅极的第三开关晶体管元件和具有第四栅极的第四开关晶体管元件。 第一开关晶体管元件和第三开关晶体管元件串联耦合在第一电源和第一下游电路之间。 第二开关晶体管元件和第四开关晶体管元件串联耦合在第二电源和第一下游电路之间。 第一栅极处的电压摆动和第二栅极处的电压摆动都大致等于第一电压幅度。 第三栅极处的电压摆动和第四栅极处的电压摆动大约等于第二电压幅度。