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公开(公告)号:US20220020445A1
公开(公告)日:2022-01-20
申请号:US17398434
申请日:2021-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungryun Kim , Yoonna Oh , Hohyun Shin , Jaeho Lee
Abstract: A semiconductor memory device comprises a memory cell array including segments disposed at corresponding intersections of row and column blocks, each row block including dynamic memory cells coupled to word-lines and bit-lines, a row decoder that activates a first word-line of a first row block in response to a row address, determines whether the first row block is a master block based on a first fuse information and a second row block is mapped as a slave to the master block, activates a second word-line of the second row block, and outputs a row block information signal, and a column decoder accessing a portion of first memory cells coupled to the first word-line or a portion of second memory cells coupled to the second word-line based on a column address, the row block information signal and a second fuse information.
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公开(公告)号:US20210012849A1
公开(公告)日:2021-01-14
申请号:US16795730
申请日:2020-02-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungryun Kim , Yoonna Oh , Hohyun Shin , Jaeho Lee
Abstract: A semiconductor memory device comprises a memory cell array including segments disposed at corresponding intersections of row and column blocks, each row block including dynamic memory cells coupled to word-lines and bit-lines, a row decoder that activates a first word-line of a first row block in response to a row address, determines whether the first row block is a master block based on a first fuse information and a second row block is mapped as a slave to the master block, activates a second word-line of the second row block, and outputs a row block information signal, and a column decoder accessing a portion of first memory cells coupled to the first word-line or a portion of second memory cells coupled to the second word-line based on a column address, the row block information signal and a second fuse information.
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